JPS5553484A - Method of correcting slet of printed board - Google Patents

Method of correcting slet of printed board

Info

Publication number
JPS5553484A
JPS5553484A JP12607178A JP12607178A JPS5553484A JP S5553484 A JPS5553484 A JP S5553484A JP 12607178 A JP12607178 A JP 12607178A JP 12607178 A JP12607178 A JP 12607178A JP S5553484 A JPS5553484 A JP S5553484A
Authority
JP
Japan
Prior art keywords
slet
correcting
printed board
printed
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12607178A
Other languages
Japanese (ja)
Inventor
Akira Fujii
Hidefumi Sakamoto
Zenichi Matsuzawa
Yoshiaki Naitou
Hiroshi Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12607178A priority Critical patent/JPS5553484A/en
Publication of JPS5553484A publication Critical patent/JPS5553484A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP12607178A 1978-10-16 1978-10-16 Method of correcting slet of printed board Pending JPS5553484A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12607178A JPS5553484A (en) 1978-10-16 1978-10-16 Method of correcting slet of printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12607178A JPS5553484A (en) 1978-10-16 1978-10-16 Method of correcting slet of printed board

Publications (1)

Publication Number Publication Date
JPS5553484A true JPS5553484A (en) 1980-04-18

Family

ID=14925887

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12607178A Pending JPS5553484A (en) 1978-10-16 1978-10-16 Method of correcting slet of printed board

Country Status (1)

Country Link
JP (1) JPS5553484A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0217878U (en) * 1988-07-22 1990-02-06
JPH02256294A (en) * 1988-12-15 1990-10-17 Matsushita Electric Works Ltd Warpage correcting device for printing wiring board
JP2002368388A (en) * 2001-06-11 2002-12-20 Murata Mfg Co Ltd Method for preventing warpage of circuit board, method for correcting warpage, and jig used therefor
JP2007110051A (en) * 2005-09-15 2007-04-26 Denso Corp Device for adjusting warpage amount of circuit board
JP2009206446A (en) * 2008-02-29 2009-09-10 Ngk Spark Plug Co Ltd Method for producing wiring board
JP2014195042A (en) * 2013-02-27 2014-10-09 Shinko Electric Ind Co Ltd Device for correcting substrate warpage and method for correcting substrate warpage
JP2015019035A (en) * 2013-06-11 2015-01-29 イビデン株式会社 Method of manufacturing wiring board, warpage correction method of wiring board and manufacturing apparatus for wiring board
CN105960708A (en) * 2014-09-27 2016-09-21 英特尔公司 Substrate warpage control using temper glass with uni-directional heating

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0217878U (en) * 1988-07-22 1990-02-06
JPH02256294A (en) * 1988-12-15 1990-10-17 Matsushita Electric Works Ltd Warpage correcting device for printing wiring board
JP2002368388A (en) * 2001-06-11 2002-12-20 Murata Mfg Co Ltd Method for preventing warpage of circuit board, method for correcting warpage, and jig used therefor
JP2007110051A (en) * 2005-09-15 2007-04-26 Denso Corp Device for adjusting warpage amount of circuit board
JP4670581B2 (en) * 2005-09-15 2011-04-13 株式会社デンソー Circuit board warpage adjustment device
JP2009206446A (en) * 2008-02-29 2009-09-10 Ngk Spark Plug Co Ltd Method for producing wiring board
JP4673388B2 (en) * 2008-02-29 2011-04-20 日本特殊陶業株式会社 Wiring board manufacturing method
JP2014195042A (en) * 2013-02-27 2014-10-09 Shinko Electric Ind Co Ltd Device for correcting substrate warpage and method for correcting substrate warpage
JP2015019035A (en) * 2013-06-11 2015-01-29 イビデン株式会社 Method of manufacturing wiring board, warpage correction method of wiring board and manufacturing apparatus for wiring board
CN105960708A (en) * 2014-09-27 2016-09-21 英特尔公司 Substrate warpage control using temper glass with uni-directional heating
JP2016540390A (en) * 2014-09-27 2016-12-22 インテル コーポレイション Warpage control of substrates using tempered glass with unidirectional heating
US9887110B2 (en) 2014-09-27 2018-02-06 Intel Corporation Substrate warpage control using temper glass with uni-directional heating

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