JPS5550997Y2 - - Google Patents
Info
- Publication number
- JPS5550997Y2 JPS5550997Y2 JP1975096508U JP9650875U JPS5550997Y2 JP S5550997 Y2 JPS5550997 Y2 JP S5550997Y2 JP 1975096508 U JP1975096508 U JP 1975096508U JP 9650875 U JP9650875 U JP 9650875U JP S5550997 Y2 JPS5550997 Y2 JP S5550997Y2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1975096508U JPS5550997Y2 (en:Method) | 1975-07-10 | 1975-07-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1975096508U JPS5550997Y2 (en:Method) | 1975-07-10 | 1975-07-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5210770U JPS5210770U (en:Method) | 1977-01-25 |
| JPS5550997Y2 true JPS5550997Y2 (en:Method) | 1980-11-27 |
Family
ID=28578221
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1975096508U Expired JPS5550997Y2 (en:Method) | 1975-07-10 | 1975-07-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5550997Y2 (en:Method) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54111767A (en) * | 1978-02-21 | 1979-09-01 | Nec Corp | Manufacture for semiconductor device |
| JPH01109320A (ja) * | 1987-10-23 | 1989-04-26 | Tanaka Sangyo:Kk | めがねフレームとパッドの固着構造 |
-
1975
- 1975-07-10 JP JP1975096508U patent/JPS5550997Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5210770U (en:Method) | 1977-01-25 |