JPS5544692A - Cursor indicator system - Google Patents

Cursor indicator system

Info

Publication number
JPS5544692A
JPS5544692A JP11957978A JP11957978A JPS5544692A JP S5544692 A JPS5544692 A JP S5544692A JP 11957978 A JP11957978 A JP 11957978A JP 11957978 A JP11957978 A JP 11957978A JP S5544692 A JPS5544692 A JP S5544692A
Authority
JP
Japan
Prior art keywords
memory
address
counter
crt
contents
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11957978A
Other languages
Japanese (ja)
Inventor
Hideo Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11957978A priority Critical patent/JPS5544692A/en
Publication of JPS5544692A publication Critical patent/JPS5544692A/en
Pending legal-status Critical Current

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  • Digital Computer Display Output (AREA)

Abstract

PURPOSE: To facilitate the retrieval for the designation address in the system to display the memory contents of the memory to the CRT, by displaying the memory contents of the designated address via the cursor and also securing the character display on the CRT for the designated address value.
CONSTITUTION: It is supposed that an optional address number (100 for example) is set to up-down counter 8. Memory 2 is set under the reading state at the prescribed time, and then address counter 21 coincides with counter 8 at the time when 100 units of clock 5 are sent in. This coincidence signal 22 continues until another one unit of clock 5 arrives. Signal 22 is displayed in the form of the luminance modulation signal, and thus the position of the designation address can be identified on CRT17. Furthermore, the contents of counter 8 is sent to the character display circuit to be thus displayed on the CRT simultaneously with the memory data.
COPYRIGHT: (C)1980,JPO&Japio
JP11957978A 1978-09-27 1978-09-27 Cursor indicator system Pending JPS5544692A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11957978A JPS5544692A (en) 1978-09-27 1978-09-27 Cursor indicator system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11957978A JPS5544692A (en) 1978-09-27 1978-09-27 Cursor indicator system

Publications (1)

Publication Number Publication Date
JPS5544692A true JPS5544692A (en) 1980-03-29

Family

ID=14764837

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11957978A Pending JPS5544692A (en) 1978-09-27 1978-09-27 Cursor indicator system

Country Status (1)

Country Link
JP (1) JPS5544692A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916707A (en) * 1982-04-21 1984-01-27 イグイエサンド・ツールス・アクチボラグ Fixture for edge of chopper

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS506380A (en) * 1972-11-15 1975-01-23

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS506380A (en) * 1972-11-15 1975-01-23

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916707A (en) * 1982-04-21 1984-01-27 イグイエサンド・ツールス・アクチボラグ Fixture for edge of chopper

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