JPS5543688A - Fourier conversion device - Google Patents

Fourier conversion device

Info

Publication number
JPS5543688A
JPS5543688A JP11726778A JP11726778A JPS5543688A JP S5543688 A JPS5543688 A JP S5543688A JP 11726778 A JP11726778 A JP 11726778A JP 11726778 A JP11726778 A JP 11726778A JP S5543688 A JPS5543688 A JP S5543688A
Authority
JP
Japan
Prior art keywords
conversion process
address
rotary
memorized
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11726778A
Other languages
Japanese (ja)
Inventor
Kenzo Hiraiwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11726778A priority Critical patent/JPS5543688A/en
Publication of JPS5543688A publication Critical patent/JPS5543688A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To secure the conversion process in an extremely high speed by substituting the fixed bit to 0 for the address of the index table in the conversion process based on the first Fourier transform algorithm.
CONSTITUTION: The pipeline processor reads out in sequence data X0(0), X0(1)... suppied through input part INR plus rotary factors W0, W1, W2... which are memorized in rotary factor memory device RFR in the order of the address memorized by the index device, and then carries out the conversion process of the 1st step. Then the rotary factors of RFR are read out in sequence based on the address obtained by setting the 1st bit of the address memorized by IDT to 0, and thus the conversion process of the 2nd step is carried out along with the value obtained through the conversion process of the 1st step. After this, in the same way, the rotary factor is read out in the conversion process of the No. i step based on the address obtained by substituting the i-1st step bit to 0 for IDT in the conversion process of the i-1st step. Using this factor and the value obtained through the conversion process of the preceding step, the Fourier coeffecient is obtained.
COPYRIGHT: (C)1980,JPO&Japio
JP11726778A 1978-09-22 1978-09-22 Fourier conversion device Pending JPS5543688A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11726778A JPS5543688A (en) 1978-09-22 1978-09-22 Fourier conversion device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11726778A JPS5543688A (en) 1978-09-22 1978-09-22 Fourier conversion device

Publications (1)

Publication Number Publication Date
JPS5543688A true JPS5543688A (en) 1980-03-27

Family

ID=14707519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11726778A Pending JPS5543688A (en) 1978-09-22 1978-09-22 Fourier conversion device

Country Status (1)

Country Link
JP (1) JPS5543688A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58169675A (en) * 1982-01-11 1983-10-06 テイ・ア−ル・ダブリユ−・インコ−ポレ−テツド Monolithic type high speed fourier transform circuit
JPS5955582A (en) * 1982-09-25 1984-03-30 Nippon Telegr & Teleph Corp <Ntt> Periodical feature extracting system
JPS61139027U (en) * 1985-02-18 1986-08-28
JPS61245617A (en) * 1985-04-23 1986-10-31 Mitsubishi Electric Corp Driving circuit for field effect type transistor
JPS62276923A (en) * 1986-05-26 1987-12-01 Hitachi Ltd Direct parallel connection circuit for gate turn-off type thyristor
JPH01253312A (en) * 1988-04-01 1989-10-09 Hitachi Ltd Parallel connection body for semiconductor device
JPH02101575A (en) * 1988-10-11 1990-04-13 Jeol Ltd Setting system for rotation factor in fast fourier transformation

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58169675A (en) * 1982-01-11 1983-10-06 テイ・ア−ル・ダブリユ−・インコ−ポレ−テツド Monolithic type high speed fourier transform circuit
JPS5955582A (en) * 1982-09-25 1984-03-30 Nippon Telegr & Teleph Corp <Ntt> Periodical feature extracting system
JPS61139027U (en) * 1985-02-18 1986-08-28
JPS61245617A (en) * 1985-04-23 1986-10-31 Mitsubishi Electric Corp Driving circuit for field effect type transistor
JPS62276923A (en) * 1986-05-26 1987-12-01 Hitachi Ltd Direct parallel connection circuit for gate turn-off type thyristor
JPH0529167B2 (en) * 1986-05-26 1993-04-28 Hitachi Ltd
JPH01253312A (en) * 1988-04-01 1989-10-09 Hitachi Ltd Parallel connection body for semiconductor device
JPH02101575A (en) * 1988-10-11 1990-04-13 Jeol Ltd Setting system for rotation factor in fast fourier transformation

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