JPS55420A - Timer operation controller - Google Patents

Timer operation controller

Info

Publication number
JPS55420A
JPS55420A JP7014078A JP7014078A JPS55420A JP S55420 A JPS55420 A JP S55420A JP 7014078 A JP7014078 A JP 7014078A JP 7014078 A JP7014078 A JP 7014078A JP S55420 A JPS55420 A JP S55420A
Authority
JP
Japan
Prior art keywords
circuit
time
memory unit
unit
coincident
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7014078A
Other languages
Japanese (ja)
Other versions
JPS6222116B2 (en
Inventor
Yoshiyuki Honda
Youshi Ootsuka
Osamu Takahashi
Manabu Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7014078A priority Critical patent/JPS55420A/en
Publication of JPS55420A publication Critical patent/JPS55420A/en
Publication of JPS6222116B2 publication Critical patent/JPS6222116B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To form a proper operation pattern as well as a timer operation starting command by providing both an ON and OFF time setting unit, which is operative to turn on and off a device at a time reaching a preset time, and a memory unit.
CONSTITUTION: If a program timer is driven under the condition having the present time and the desired ON and OFF times set in respective memory units, the content of a present time memory unit 2 is invaried and is stored in a temporary stand-by unit 5 for the present time. At the same time, the memory unit 2 becomes completely coincident with either of an ON time memory unit 3 and an OFF time memory unit 4 so that a value of +1 is stored including the unit raising process in the memory unit 2 by the actions of an adding circuit 7 and a counting circuit 1 until a coincident output appears in a coincident circuit 8 or 9. In case the circuit 8 generates its output earlier after the adding process, the timer operations are started from the OFF start, whereas they are started from the ON start in case the circuit 9 is earlier. In these ways, a pattern judging circuit 10 generates its output so that the control of a device is performed by the circuit 10. Thus, it is possible to form the proper operation patterns.
COPYRIGHT: (C)1980,JPO&Japio
JP7014078A 1978-06-09 1978-06-09 Timer operation controller Granted JPS55420A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7014078A JPS55420A (en) 1978-06-09 1978-06-09 Timer operation controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7014078A JPS55420A (en) 1978-06-09 1978-06-09 Timer operation controller

Publications (2)

Publication Number Publication Date
JPS55420A true JPS55420A (en) 1980-01-05
JPS6222116B2 JPS6222116B2 (en) 1987-05-15

Family

ID=13422961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7014078A Granted JPS55420A (en) 1978-06-09 1978-06-09 Timer operation controller

Country Status (1)

Country Link
JP (1) JPS55420A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5799194U (en) * 1980-12-11 1982-06-18
JPS5947897U (en) * 1982-09-22 1984-03-30 富士電機株式会社 Switching time setting circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5799194U (en) * 1980-12-11 1982-06-18
JPS5947897U (en) * 1982-09-22 1984-03-30 富士電機株式会社 Switching time setting circuit

Also Published As

Publication number Publication date
JPS6222116B2 (en) 1987-05-15

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