JPS5534302A - Memory device diagnostic system - Google Patents

Memory device diagnostic system

Info

Publication number
JPS5534302A
JPS5534302A JP10547678A JP10547678A JPS5534302A JP S5534302 A JPS5534302 A JP S5534302A JP 10547678 A JP10547678 A JP 10547678A JP 10547678 A JP10547678 A JP 10547678A JP S5534302 A JPS5534302 A JP S5534302A
Authority
JP
Japan
Prior art keywords
memory device
refresh
examined
period
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10547678A
Other languages
Japanese (ja)
Inventor
Shoji Nakatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10547678A priority Critical patent/JPS5534302A/en
Publication of JPS5534302A publication Critical patent/JPS5534302A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To program the select of refresh period of the memory device, and make variable the period of refresh by the refresh counter, thereby detect the obstacles such as deterioration due to the change as the time passing in the memory device.
CONSTITUTION: In the memory device diagnosis device comprising a memory device 1 to be examined, and a refresh counter 21, and provided with a memory control device 2 and an diagnosis control device 7 for carrying out the controls such as access to the memory device 1 to be examined and refresh, a register 23 or a key is provided which can arbitrarily set the period of the refresh at times of integer of a normal value in the memory control device every memory device to be examined and the period setting register 23 is rewritten by the diagnostic program through the diagnostic control device 7 and thereafter the diagnosis of the memory device to be examined is carried out.
COPYRIGHT: (C)1980,JPO&Japio
JP10547678A 1978-08-31 1978-08-31 Memory device diagnostic system Pending JPS5534302A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10547678A JPS5534302A (en) 1978-08-31 1978-08-31 Memory device diagnostic system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10547678A JPS5534302A (en) 1978-08-31 1978-08-31 Memory device diagnostic system

Publications (1)

Publication Number Publication Date
JPS5534302A true JPS5534302A (en) 1980-03-10

Family

ID=14408638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10547678A Pending JPS5534302A (en) 1978-08-31 1978-08-31 Memory device diagnostic system

Country Status (1)

Country Link
JP (1) JPS5534302A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100336838B1 (en) * 1999-06-17 2002-05-16 윤종용 Dynamic random access memory device with refresh period selecting circuit and input/output bit width selecting circuit
JP2010157276A (en) * 2008-12-26 2010-07-15 Fujitsu Ltd Device and method for detecting lifetime of memory

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100336838B1 (en) * 1999-06-17 2002-05-16 윤종용 Dynamic random access memory device with refresh period selecting circuit and input/output bit width selecting circuit
JP2010157276A (en) * 2008-12-26 2010-07-15 Fujitsu Ltd Device and method for detecting lifetime of memory

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