JPS5532220A - Saturation level detector - Google Patents

Saturation level detector

Info

Publication number
JPS5532220A
JPS5532220A JP10324978A JP10324978A JPS5532220A JP S5532220 A JPS5532220 A JP S5532220A JP 10324978 A JP10324978 A JP 10324978A JP 10324978 A JP10324978 A JP 10324978A JP S5532220 A JPS5532220 A JP S5532220A
Authority
JP
Japan
Prior art keywords
level
output
time
saturation level
saturation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10324978A
Other languages
Japanese (ja)
Inventor
Kozo Komiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP10324978A priority Critical patent/JPS5532220A/en
Publication of JPS5532220A publication Critical patent/JPS5532220A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To obtain a saturation level in a frequency band where no recording demagnetization occurs, by making a level regulator regulate several reference signals to fixed values.
CONSTITUTION: In a period of time from T0 to T4, level regulator 13 is so adjusted that the output of recording amplifier 13 will be level Q much higher than saturation level Q3. At time T4, the output of recording amplifier 13 is adjusted to level Q2 much less than saturation level Q3. As a result, the output level of adder circuit 22 at time T5 is equal to difference P1-P2 between output level P1 of holding circuit 23 and level P2 of output (d) of peak detector 21 and the level of output (g) of peak detector 25 after time T4, on the other hand, becomes Q3 for demagnetizing, so that the level of output (h) of adder circuit 26 after time T5 will be Q2+(P1-P2). This level (h) is equivalent to the saturation level. Therefore, the saturation level in a band where no demagnetization occurs can be found.
COPYRIGHT: (C)1980,JPO&Japio
JP10324978A 1978-08-24 1978-08-24 Saturation level detector Pending JPS5532220A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10324978A JPS5532220A (en) 1978-08-24 1978-08-24 Saturation level detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10324978A JPS5532220A (en) 1978-08-24 1978-08-24 Saturation level detector

Publications (1)

Publication Number Publication Date
JPS5532220A true JPS5532220A (en) 1980-03-06

Family

ID=14349160

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10324978A Pending JPS5532220A (en) 1978-08-24 1978-08-24 Saturation level detector

Country Status (1)

Country Link
JP (1) JPS5532220A (en)

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