JPS55150070A - Optional voltage generator - Google Patents

Optional voltage generator

Info

Publication number
JPS55150070A
JPS55150070A JP5887179A JP5887179A JPS55150070A JP S55150070 A JPS55150070 A JP S55150070A JP 5887179 A JP5887179 A JP 5887179A JP 5887179 A JP5887179 A JP 5887179A JP S55150070 A JPS55150070 A JP S55150070A
Authority
JP
Japan
Prior art keywords
voltage
via gate
rom3
ram4
encoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5887179A
Other languages
Japanese (ja)
Inventor
Akira Matsushita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP5887179A priority Critical patent/JPS55150070A/en
Publication of JPS55150070A publication Critical patent/JPS55150070A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Voltage And Current In General (AREA)

Abstract

PURPOSE:To obtain the optional voltage with a small capacity by deciding both the upper and lower limit value of the voltage variable range through the voltage setting unit to memorize these value into the fixed memory device and then extracting the desired voltage out of the memory device by means of the output voltage selection switch and the encoder. CONSTITUTION:The voltage setting switch provided on keyboard 1 is operated to decide the upper and lower limit value of the voltage variable range plus the type of the linear or logarithmic variable curve. These decided factors are memorized in ROM3 functioning as a fixed memory unit via line 11 and CPU2 which is controlled by data bus line 10 and clock oscillator 5. Then switch SW for selection of the output voltage is operated to actuate encoder 6, and then the voltage memorized in ROM3 is read out via gate 7 to be delivered via gate 7 again after converted into the desired voltage by means of D/A converter 9 and via writing means RAM4. The area between RAM4 and converter 9 is connected to bus 10 via gate 8.
JP5887179A 1979-05-14 1979-05-14 Optional voltage generator Pending JPS55150070A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5887179A JPS55150070A (en) 1979-05-14 1979-05-14 Optional voltage generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5887179A JPS55150070A (en) 1979-05-14 1979-05-14 Optional voltage generator

Publications (1)

Publication Number Publication Date
JPS55150070A true JPS55150070A (en) 1980-11-21

Family

ID=13096800

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5887179A Pending JPS55150070A (en) 1979-05-14 1979-05-14 Optional voltage generator

Country Status (1)

Country Link
JP (1) JPS55150070A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63188716U (en) * 1987-05-25 1988-12-05

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63188716U (en) * 1987-05-25 1988-12-05

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