JPS55118228A - Analog input unit - Google Patents

Analog input unit

Info

Publication number
JPS55118228A
JPS55118228A JP2560479A JP2560479A JPS55118228A JP S55118228 A JPS55118228 A JP S55118228A JP 2560479 A JP2560479 A JP 2560479A JP 2560479 A JP2560479 A JP 2560479A JP S55118228 A JPS55118228 A JP S55118228A
Authority
JP
Japan
Prior art keywords
gate
switch
output
noise
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2560479A
Other languages
Japanese (ja)
Inventor
Masayuki Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP2560479A priority Critical patent/JPS55118228A/en
Publication of JPS55118228A publication Critical patent/JPS55118228A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To avoid the noise generated at one ON-line active line insertion and deinsertion of duplicated analog signal amplifier (Amp) from affecting to another Amp. CONSTITUTION:While Amp 1 is in operation and Amp 2 is inserted, the switch 7 is closed at insertion and the control signal 200 is at ''0'' level, FF4 is cleared and the drive gate 8 is inhibited for the operation (in OFF state) and all other output gate operation is inhibited with the control signal 200. Next, when the switch 7 is opened, the operation of the gate 8 and FF4 is enabled, the operation of Amp 1 is finished, and when the BUSY signal 100 is at ''0'' level, FF4 is set and the output signal 300 is at ''0'', the output 400 of the drive gate 8 is at ''0'', the switch 9 is driven and + or -15V is applied to Amp 2. Accordingly, the noise produced at the application is produced only at nonoperation (NONBUSY period) of Amp subject to noise.
JP2560479A 1979-03-07 1979-03-07 Analog input unit Pending JPS55118228A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2560479A JPS55118228A (en) 1979-03-07 1979-03-07 Analog input unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2560479A JPS55118228A (en) 1979-03-07 1979-03-07 Analog input unit

Publications (1)

Publication Number Publication Date
JPS55118228A true JPS55118228A (en) 1980-09-11

Family

ID=12170501

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2560479A Pending JPS55118228A (en) 1979-03-07 1979-03-07 Analog input unit

Country Status (1)

Country Link
JP (1) JPS55118228A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0201136B1 (en) * 1985-05-10 1990-12-19 Philips Composants Digital multiplexer module with n inputs and multiplexer with n-squared inputs containing such a module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0201136B1 (en) * 1985-05-10 1990-12-19 Philips Composants Digital multiplexer module with n inputs and multiplexer with n-squared inputs containing such a module

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