JPS55110411A - Automatic gain control circuit - Google Patents

Automatic gain control circuit

Info

Publication number
JPS55110411A
JPS55110411A JP1800879A JP1800879A JPS55110411A JP S55110411 A JPS55110411 A JP S55110411A JP 1800879 A JP1800879 A JP 1800879A JP 1800879 A JP1800879 A JP 1800879A JP S55110411 A JPS55110411 A JP S55110411A
Authority
JP
Japan
Prior art keywords
circuit
control circuit
value
signal
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1800879A
Other languages
Japanese (ja)
Inventor
Toshiharu Yasuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1800879A priority Critical patent/JPS55110411A/en
Publication of JPS55110411A publication Critical patent/JPS55110411A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE: To enable to perform optimizing control for the amplitude of video signal including synchronizing signal, by connecting the control circuit in parallel with the sampling circuit and by making in agreement the voltage difference between the input and output of the sampling circuit to the set value if it exceeds a given value.
CONSTITUTION: In the constitution in which the control circuit 31 is connected in parallel with the sampling circuit 5, if AGC circuit normally operates, the circuit 31 is inoperative. Further, if the input video signal rapidly increases and the voltage difference between the output signal S5 and the input signal S3 of the circuit 5 exceeds a given value, or the output signal voltage saturates, the circuit 31 is operated so that it is in agreement with the pr-determined value. Thus, the amplitude of the video signal including the synchronizing signal can be controlled to optimized value.
COPYRIGHT: (C)1980,JPO&Japio
JP1800879A 1979-02-19 1979-02-19 Automatic gain control circuit Pending JPS55110411A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1800879A JPS55110411A (en) 1979-02-19 1979-02-19 Automatic gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1800879A JPS55110411A (en) 1979-02-19 1979-02-19 Automatic gain control circuit

Publications (1)

Publication Number Publication Date
JPS55110411A true JPS55110411A (en) 1980-08-25

Family

ID=11959643

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1800879A Pending JPS55110411A (en) 1979-02-19 1979-02-19 Automatic gain control circuit

Country Status (1)

Country Link
JP (1) JPS55110411A (en)

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