JPS55104167A - Scanning line density conversion system for facsimile signal - Google Patents

Scanning line density conversion system for facsimile signal

Info

Publication number
JPS55104167A
JPS55104167A JP1034979A JP1034979A JPS55104167A JP S55104167 A JPS55104167 A JP S55104167A JP 1034979 A JP1034979 A JP 1034979A JP 1034979 A JP1034979 A JP 1034979A JP S55104167 A JPS55104167 A JP S55104167A
Authority
JP
Japan
Prior art keywords
line density
circuit
conversion
absolute address
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1034979A
Other languages
Japanese (ja)
Inventor
Yuzo Omiya
Kunihiko Sekiya
Toshiharu Hirose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP1034979A priority Critical patent/JPS55104167A/en
Publication of JPS55104167A publication Critical patent/JPS55104167A/en
Pending legal-status Critical Current

Links

Landscapes

  • Editing Of Facsimile Originals (AREA)
  • Image Processing (AREA)

Abstract

PURPOSE: To perform the scanning line density conversion less in conversion distortion, by multiplying the absolute address of white and black video element changing point of facsimile signal by the rate of conversion, and taking integer multiple close to the value as the absolute address of signal changing point after conversion.
CONSTITUTION: The facsimile signal expressed in the absolute address with the scanning line density M is fed to one input of the addition circuit 3 via the relative address input circuit 1, and the signal from the absolute address memory circuit 2 is fed to another input. The circuit 2 stores the absolute address of the line density M before by one operated at the circuit 3. The signal converting the relative address into absolute address by the circuit 3 is fed to the conversion rate multiplication circuit 4 to multiply the ratio of the line density M to the line density N after conversion with the input signal, and it is fed to the residual processing circuit 5 for residual processing, and the signal expressed in the absolute address with the line density N is fed to the absolute address output circuit 6 to finish the line density conversion.
COPYRIGHT: (C)1980,JPO&Japio
JP1034979A 1979-02-02 1979-02-02 Scanning line density conversion system for facsimile signal Pending JPS55104167A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1034979A JPS55104167A (en) 1979-02-02 1979-02-02 Scanning line density conversion system for facsimile signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1034979A JPS55104167A (en) 1979-02-02 1979-02-02 Scanning line density conversion system for facsimile signal

Publications (1)

Publication Number Publication Date
JPS55104167A true JPS55104167A (en) 1980-08-09

Family

ID=11747705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1034979A Pending JPS55104167A (en) 1979-02-02 1979-02-02 Scanning line density conversion system for facsimile signal

Country Status (1)

Country Link
JP (1) JPS55104167A (en)

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