JPS55100789A - A/d converter for video signal - Google Patents
A/d converter for video signalInfo
- Publication number
- JPS55100789A JPS55100789A JP894279A JP894279A JPS55100789A JP S55100789 A JPS55100789 A JP S55100789A JP 894279 A JP894279 A JP 894279A JP 894279 A JP894279 A JP 894279A JP S55100789 A JPS55100789 A JP S55100789A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- video signal
- converter
- adder
- shd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Color Television Systems (AREA)
Abstract
PURPOSE: To bear fixed phase relation between a sampling clock pulse when a color video signal is A/D converted and a digitized chroma signal.
CONSTITUTION: Analog color video signal SA is sampled and held, and then digitized by A/D converter 4, and digital filter 5 extracts and applies chroma signal SDC and burst signal SDB to latch circuit 6. On the other hand, horizontal synchronizing signal SHD delayed by a fixed time from signal SA is extracted and latch signal SL synchronizing with clock SSC' included in the pulse width of SHD is obtained by synchronous circuit 10 at point t2. From latch circuit 6, digital code D at point t2 of SDB is obtained and added by adder 17 by way of amplifier 11 and loop filter 12, and the output of adder 17 is D/A-converted to obtain signal VC for phase control.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP894279A JPS55100789A (en) | 1979-01-29 | 1979-01-29 | A/d converter for video signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP894279A JPS55100789A (en) | 1979-01-29 | 1979-01-29 | A/d converter for video signal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55100789A true JPS55100789A (en) | 1980-07-31 |
| JPS647556B2 JPS647556B2 (en) | 1989-02-09 |
Family
ID=11706716
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP894279A Granted JPS55100789A (en) | 1979-01-29 | 1979-01-29 | A/d converter for video signal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55100789A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5860889A (en) * | 1981-09-15 | 1983-04-11 | シ−メンス・アクチエンゲゼルシヤフト | Method and device for adjusting system lock phase for digital signal processing system |
| JPS62193392A (en) * | 1986-02-14 | 1987-08-25 | ティアールダブリュー インコーポレーテッド | Method and apparatus for synchronizing digital processing timing signal with video signal |
| US5243412A (en) * | 1990-08-09 | 1993-09-07 | Victor Company Of Japan, Ltd. | Circuit for generating a clock signal which is locked to a specific phase of a color burst signal in a color video signal |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51129126A (en) * | 1975-04-05 | 1976-11-10 | Nec Corp | Image signal coding system |
-
1979
- 1979-01-29 JP JP894279A patent/JPS55100789A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51129126A (en) * | 1975-04-05 | 1976-11-10 | Nec Corp | Image signal coding system |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5860889A (en) * | 1981-09-15 | 1983-04-11 | シ−メンス・アクチエンゲゼルシヤフト | Method and device for adjusting system lock phase for digital signal processing system |
| JPS62193392A (en) * | 1986-02-14 | 1987-08-25 | ティアールダブリュー インコーポレーテッド | Method and apparatus for synchronizing digital processing timing signal with video signal |
| JPH0419758B2 (en) * | 1986-02-14 | 1992-03-31 | Trw Inc | |
| US5243412A (en) * | 1990-08-09 | 1993-09-07 | Victor Company Of Japan, Ltd. | Circuit for generating a clock signal which is locked to a specific phase of a color burst signal in a color video signal |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS647556B2 (en) | 1989-02-09 |
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