JPS5496775A - Method of forming circuit - Google Patents

Method of forming circuit

Info

Publication number
JPS5496775A
JPS5496775A JP279678A JP279678A JPS5496775A JP S5496775 A JPS5496775 A JP S5496775A JP 279678 A JP279678 A JP 279678A JP 279678 A JP279678 A JP 279678A JP S5496775 A JPS5496775 A JP S5496775A
Authority
JP
Japan
Prior art keywords
forming circuit
circuit
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP279678A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5622158B2 (US07655746-20100202-C00011.png
Inventor
Yoshio Honma
Hisao Nozawa
Akira Satou
Yukiyoshi Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP279678A priority Critical patent/JPS5496775A/ja
Priority to US06/000,708 priority patent/US4208257A/en
Priority to FR7900587A priority patent/FR2414792A1/fr
Priority to GB791512A priority patent/GB2012490B/en
Priority to DE2901697A priority patent/DE2901697C3/de
Priority to NL7900379A priority patent/NL7900379A/xx
Publication of JPS5496775A publication Critical patent/JPS5496775A/ja
Publication of JPS5622158B2 publication Critical patent/JPS5622158B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/7688—Filling of holes, grooves or trenches, e.g. vias, with conductive material by deposition over sacrificial masking layer, e.g. lift-off
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/07—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process being removed electrolytically
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • H05K3/143—Masks therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Weting (AREA)
JP279678A 1978-01-17 1978-01-17 Method of forming circuit Granted JPS5496775A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP279678A JPS5496775A (en) 1978-01-17 1978-01-17 Method of forming circuit
US06/000,708 US4208257A (en) 1978-01-17 1979-01-03 Method of forming an interconnection
FR7900587A FR2414792A1 (fr) 1978-01-17 1979-01-11 Methode de formation d'une interconnexion
GB791512A GB2012490B (en) 1978-01-17 1979-01-16 Method of forming an inter-connection pattern on a substrate
DE2901697A DE2901697C3 (de) 1978-01-17 1979-01-17 Verfahren zur Ausbildung von Leitungsverbindungen auf einem Substrat
NL7900379A NL7900379A (nl) 1978-01-17 1979-01-17 Werkwijze voor de vorming van een verbinding.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP279678A JPS5496775A (en) 1978-01-17 1978-01-17 Method of forming circuit

Publications (2)

Publication Number Publication Date
JPS5496775A true JPS5496775A (en) 1979-07-31
JPS5622158B2 JPS5622158B2 (US07655746-20100202-C00011.png) 1981-05-23

Family

ID=11539323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP279678A Granted JPS5496775A (en) 1978-01-17 1978-01-17 Method of forming circuit

Country Status (6)

Country Link
US (1) US4208257A (US07655746-20100202-C00011.png)
JP (1) JPS5496775A (US07655746-20100202-C00011.png)
DE (1) DE2901697C3 (US07655746-20100202-C00011.png)
FR (1) FR2414792A1 (US07655746-20100202-C00011.png)
GB (1) GB2012490B (US07655746-20100202-C00011.png)
NL (1) NL7900379A (US07655746-20100202-C00011.png)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2186424A (en) * 1986-01-30 1987-08-12 Plessey Co Plc Method for producing integrated circuit interconnects
US4709468A (en) * 1986-01-31 1987-12-01 Texas Instruments Incorporated Method for producing an integrated circuit product having a polyimide film interconnection structure
US4964945A (en) * 1988-12-09 1990-10-23 Minnesota Mining And Manufacturing Company Lift off patterning process on a flexible substrate
JP2855255B2 (ja) * 1994-07-26 1999-02-10 日本メクトロン株式会社 磁気ヘッド用サスペンション及びその製造法
US5476575A (en) * 1994-08-03 1995-12-19 International Business Machines Corporation Fabrication of moly masks by electroetching
US6027632A (en) * 1996-03-05 2000-02-22 Candescent Technologies Corporation Multi-step removal of excess emitter material in fabricating electron-emitting device
US5893967A (en) * 1996-03-05 1999-04-13 Candescent Technologies Corporation Impedance-assisted electrochemical removal of material, particularly excess emitter material in electron-emitting device
US5766446A (en) * 1996-03-05 1998-06-16 Candescent Technologies Corporation Electrochemical removal of material, particularly excess emitter material in electron-emitting device
JP3107746B2 (ja) * 1996-04-27 2000-11-13 日本メクトロン株式会社 磁気ヘッド用サスペンションの製造法
JPH10261212A (ja) * 1996-09-27 1998-09-29 Nippon Mektron Ltd 回路配線付き磁気ヘッド用サスペンションの製造法
US6120674A (en) * 1997-06-30 2000-09-19 Candescent Technologies Corporation Electrochemical removal of material in electron-emitting device
US6007695A (en) * 1997-09-30 1999-12-28 Candescent Technologies Corporation Selective removal of material using self-initiated galvanic activity in electrolytic bath
US7837929B2 (en) * 2005-10-20 2010-11-23 H.C. Starck Inc. Methods of making molybdenum titanium sputtering plates and targets
US8449818B2 (en) 2010-06-30 2013-05-28 H. C. Starck, Inc. Molybdenum containing targets
US8449817B2 (en) 2010-06-30 2013-05-28 H.C. Stark, Inc. Molybdenum-containing targets comprising three metal elements
CN102623579A (zh) * 2011-01-28 2012-08-01 展晶科技(深圳)有限公司 半导体发光芯片制造方法
CN102646766B (zh) * 2011-02-18 2014-08-27 展晶科技(深圳)有限公司 Led磊晶结构及制程
JP5808066B2 (ja) 2011-05-10 2015-11-10 エイチ．シー．スターク インク． 複合ターゲット
US9334565B2 (en) 2012-05-09 2016-05-10 H.C. Starck Inc. Multi-block sputtering target with interface portions and associated methods and articles
CN112533386A (zh) * 2020-12-24 2021-03-19 深圳市百柔新材料技术有限公司 一种导电电路板的制作方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3560357A (en) * 1968-07-26 1971-02-02 Rca Corp Electroetching of a conductive film on an insulating substrate
NL163370C (nl) * 1972-04-28 1980-08-15 Philips Nv Werkwijze voor het vervaardigen van een halfgeleider- inrichting met een geleiderpatroon.
US3785945A (en) * 1972-05-04 1974-01-15 Bell Telephone Labor Inc Technique for electrolytically etching tungsten
NL7401859A (nl) * 1974-02-12 1975-08-14 Philips Nv Werkwijze voor het vervaardigen van een patroon en of meer lagen op een ondergrond door selijk verwijderen van deze laag of lagen sputteretsen en voorwerpen, in het bijzon- alfgeleiderinrichtingen, vervaardigd met ssing van deze werkwijze.
DE2432719B2 (de) * 1974-07-08 1977-06-02 Siemens AG, 1000 Berlin und 8000 München Verfahren zum erzeugen von feinen strukturen aus aufdampfbaren materialien auf einer unterlage und anwendung des verfahrens
FR2284981A1 (fr) * 1974-09-10 1976-04-09 Radiotechnique Compelec Procede d'obtention d'un circuit integre semiconducteur
US4004044A (en) * 1975-05-09 1977-01-18 International Business Machines Corporation Method for forming patterned films utilizing a transparent lift-off mask
US4094057A (en) * 1976-03-29 1978-06-13 International Business Machines Corporation Field effect transistor lost film fabrication process

Also Published As

Publication number Publication date
DE2901697C3 (de) 1982-06-09
DE2901697B2 (de) 1980-09-04
NL7900379A (nl) 1979-07-19
US4208257A (en) 1980-06-17
FR2414792A1 (fr) 1979-08-10
DE2901697A1 (de) 1979-07-19
FR2414792B1 (US07655746-20100202-C00011.png) 1982-10-29
GB2012490A (en) 1979-07-25
GB2012490B (en) 1982-04-21
JPS5622158B2 (US07655746-20100202-C00011.png) 1981-05-23

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