JPS5496545U - - Google Patents

Info

Publication number
JPS5496545U
JPS5496545U JP1978173670U JP17367078U JPS5496545U JP S5496545 U JPS5496545 U JP S5496545U JP 1978173670 U JP1978173670 U JP 1978173670U JP 17367078 U JP17367078 U JP 17367078U JP S5496545 U JPS5496545 U JP S5496545U
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1978173670U
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS5496545U publication Critical patent/JPS5496545U/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/145—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
JP1978173670U 1977-12-19 1978-12-18 Pending JPS5496545U (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/861,798 US4241401A (en) 1977-12-19 1977-12-19 Virtual address translator utilizing interrupt level code

Publications (1)

Publication Number Publication Date
JPS5496545U true JPS5496545U (ja) 1979-07-07

Family

ID=25336793

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1978173670U Pending JPS5496545U (ja) 1977-12-19 1978-12-18

Country Status (2)

Country Link
US (1) US4241401A (ja)
JP (1) JPS5496545U (ja)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4408292A (en) * 1979-09-27 1983-10-04 Sharp Kabushiki Kaisha Data print control in an electronic cash register
US4409655A (en) * 1980-04-25 1983-10-11 Data General Corporation Hierarchial memory ring protection system using comparisons of requested and previously accessed addresses
US4500952A (en) * 1980-05-23 1985-02-19 International Business Machines Corporation Mechanism for control of address translation by a program using a plurality of translation tables
JPS5764383A (en) * 1980-10-03 1982-04-19 Toshiba Corp Address converting method and its device
US4456954A (en) * 1981-06-15 1984-06-26 International Business Machines Corporation Virtual machine system with guest architecture emulation using hardware TLB's for plural level address translations
JPS6047624B2 (ja) * 1982-06-30 1985-10-22 富士通株式会社 アドレス変換制御方式
US4602368A (en) * 1983-04-15 1986-07-22 Honeywell Information Systems Inc. Dual validity bit arrays
US4580217A (en) * 1983-06-22 1986-04-01 Ncr Corporation High speed memory management system and method
US4538241A (en) * 1983-07-14 1985-08-27 Burroughs Corporation Address translation buffer
US4779188A (en) * 1983-12-14 1988-10-18 International Business Machines Corporation Selective guest system purge control
US4587610A (en) * 1984-02-10 1986-05-06 Prime Computer, Inc. Address translation systems for high speed computer memories
US4695950A (en) * 1984-09-17 1987-09-22 International Business Machines Corporation Fast two-level dynamic address translation method and means
US4674039A (en) * 1984-10-09 1987-06-16 Chouery Farid A Method for determining whether a given value is included in an ordered table of values stored in a computer readable memory
JPH0652511B2 (ja) * 1984-12-14 1994-07-06 株式会社日立製作所 情報処理装置のアドレス変換方式
US4758982A (en) * 1986-01-08 1988-07-19 Advanced Micro Devices, Inc. Quasi content addressable memory
US5249276A (en) * 1987-06-22 1993-09-28 Hitachi, Ltd. Address translation apparatus having a memory access privilege check capability data which uses mask data to select bit positions of priviledge
US5317717A (en) * 1987-07-01 1994-05-31 Digital Equipment Corp. Apparatus and method for main memory unit protection using access and fault logic signals
US5142676A (en) * 1988-12-28 1992-08-25 Gte Laboratories Incorporated Separate content addressable memories for storing locked segment addresses and locking processor identifications for controlling access to shared memory
US5099415A (en) * 1989-02-15 1992-03-24 International Business Machines Guess mechanism for virtual address translation
US5265227A (en) * 1989-11-14 1993-11-23 Intel Corporation Parallel protection checking in an address translation look-aside buffer
US5317708A (en) * 1990-06-29 1994-05-31 Digital Equipment Corporation Apparatus and method for an improved content addressable memory
US5301100A (en) * 1991-04-29 1994-04-05 Wagner Ferdinand H Method of and apparatus for constructing a control system and control system created thereby
US5960463A (en) * 1996-05-16 1999-09-28 Advanced Micro Devices, Inc. Cache controller with table walk logic tightly coupled to second level access logic
WO2014125324A1 (en) 2013-02-12 2014-08-21 Freescale Semiconductor, Inc. A method of and circuitry for controlling access by a master to a peripheral, a method of configuring such circuitry, and associated computer program products
US9954557B2 (en) * 2014-04-30 2018-04-24 Microsoft Technology Licensing, Llc Variable width error correction

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5040240A (ja) * 1973-08-16 1975-04-12
JPS5188140A (ja) * 1975-01-31 1976-08-02
JPS52123834A (en) * 1976-04-09 1977-10-18 Fujitsu Ltd Processing of memory and key information

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR10582E (fr) * 1970-06-29 1909-07-30 Paul Alexis Victor Lerolle Jeu de serrures avec passe-partout
US3761881A (en) * 1971-06-30 1973-09-25 Ibm Translation storage scheme for virtual memory system
US3761883A (en) * 1972-01-20 1973-09-25 Ibm Storage protect key array for a multiprocessing system
US3902164A (en) * 1972-07-21 1975-08-26 Ibm Method and means for reducing the amount of address translation in a virtual memory data processing system
US3829840A (en) * 1972-07-24 1974-08-13 Ibm Virtual memory system
US3854126A (en) * 1972-10-10 1974-12-10 Digital Equipment Corp Circuit for converting virtual addresses into physical addresses
US3781808A (en) * 1972-10-17 1973-12-25 Ibm Virtual memory system
JPS532296B2 (ja) * 1973-03-19 1978-01-26
US3825904A (en) * 1973-06-08 1974-07-23 Ibm Virtual memory system
US3839706A (en) * 1973-07-02 1974-10-01 Ibm Input/output channel relocation storage protect mechanism
US3866183A (en) * 1973-08-31 1975-02-11 Honeywell Inf Systems Communications control apparatus for the use with a cache store
US3909798A (en) * 1974-01-25 1975-09-30 Raytheon Co Virtual addressing method and apparatus
US3938100A (en) * 1974-06-07 1976-02-10 Control Data Corporation Virtual addressing apparatus for addressing the memory of a computer utilizing associative addressing techniques
US4038645A (en) * 1976-04-30 1977-07-26 International Business Machines Corporation Non-translatable storage protection control system
US4053948A (en) * 1976-06-21 1977-10-11 Ibm Corporation Look aside array invalidation mechanism
US4087856A (en) * 1976-06-30 1978-05-02 International Business Machines Corporation Location dependence for assuring the security of system-control operations
US4084226A (en) * 1976-09-24 1978-04-11 Sperry Rand Corporation Virtual address translator
US4093986A (en) * 1976-12-27 1978-06-06 International Business Machines Corporation Address translation with storage protection
US4096573A (en) * 1977-04-25 1978-06-20 International Business Machines Corporation DLAT Synonym control means for common portions of all address spaces

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5040240A (ja) * 1973-08-16 1975-04-12
JPS5188140A (ja) * 1975-01-31 1976-08-02
JPS52123834A (en) * 1976-04-09 1977-10-18 Fujitsu Ltd Processing of memory and key information

Also Published As

Publication number Publication date
US4241401A (en) 1980-12-23

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