JPS5481020A - Receiver for character broadcast - Google Patents

Receiver for character broadcast

Info

Publication number
JPS5481020A
JPS5481020A JP14900677A JP14900677A JPS5481020A JP S5481020 A JPS5481020 A JP S5481020A JP 14900677 A JP14900677 A JP 14900677A JP 14900677 A JP14900677 A JP 14900677A JP S5481020 A JPS5481020 A JP S5481020A
Authority
JP
Japan
Prior art keywords
signal
line
address
fed
character
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14900677A
Other languages
Japanese (ja)
Inventor
Yoshio Ishigaki
Eiji Tamaru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP14900677A priority Critical patent/JPS5481020A/en
Publication of JPS5481020A publication Critical patent/JPS5481020A/en
Pending legal-status Critical Current

Links

Landscapes

  • Television Signal Processing For Recording (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE: To easily obtain the field character signal, by sequentially picking up and recording the line character signal of the composite line signal of the composite character signal superimposed within vertical frequency period of TV signal on the rotary recording sheet and by reproducing it.
CONSTITUTION: TV input signal is fed to the terminal 7 and the composite line signal is picked up with the gate circuit 8. The line character signal among this is fed to the magnetic head 4 of the rotary recording sheet 1 via the buffer memory 10. The line code signal from the line code signal picking up gate circuit 19 is fed to the address discriminating and comparison circuir 22. The address signal reproduced from the magnetic head 6 is compared with the line code signal through the address signal counter 21, and when the address designated comes at the head 4, the line character signal is moved from the buffer memory to the recording track.
COPYRIGHT: (C)1979,JPO&Japio
JP14900677A 1977-12-12 1977-12-12 Receiver for character broadcast Pending JPS5481020A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14900677A JPS5481020A (en) 1977-12-12 1977-12-12 Receiver for character broadcast

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14900677A JPS5481020A (en) 1977-12-12 1977-12-12 Receiver for character broadcast

Publications (1)

Publication Number Publication Date
JPS5481020A true JPS5481020A (en) 1979-06-28

Family

ID=15465596

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14900677A Pending JPS5481020A (en) 1977-12-12 1977-12-12 Receiver for character broadcast

Country Status (1)

Country Link
JP (1) JPS5481020A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5051661A (en) * 1973-09-07 1975-05-08
JPS5051611A (en) * 1973-09-07 1975-05-08

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5051661A (en) * 1973-09-07 1975-05-08
JPS5051611A (en) * 1973-09-07 1975-05-08

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