JPS5463623A - Screen display system - Google Patents

Screen display system

Info

Publication number
JPS5463623A
JPS5463623A JP12989677A JP12989677A JPS5463623A JP S5463623 A JPS5463623 A JP S5463623A JP 12989677 A JP12989677 A JP 12989677A JP 12989677 A JP12989677 A JP 12989677A JP S5463623 A JPS5463623 A JP S5463623A
Authority
JP
Japan
Prior art keywords
input
data
memory
register
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12989677A
Other languages
Japanese (ja)
Inventor
Hiroshi Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12989677A priority Critical patent/JPS5463623A/en
Publication of JPS5463623A publication Critical patent/JPS5463623A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To program without regarding address relations by one command, by obtaining a desired position by designating simply X and Y positions on a screen in no consideration of a calculating table.
CONSTITUTION: In a CRT display device where input data is inputted to refresh memory 8 and is stored in data register 6 and is displayed on CRT 4, register 5 to accept display data, control part 16 to control the input of input data, and data register 6 to hold display data in register 5 which is subjected to the input control by control part 16 are provided. Further, address counter 9 which converts positions on X and Y axes given from address line 15 to addresses corresponding to memory 8 is provided to input an input/output command from the external to control part 16 through control signal line 20 and obtain addresses corresponding to memory 8, thereby designating an arbitrary position to memory 8.
COPYRIGHT: (C)1979,JPO&Japio
JP12989677A 1977-10-29 1977-10-29 Screen display system Pending JPS5463623A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12989677A JPS5463623A (en) 1977-10-29 1977-10-29 Screen display system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12989677A JPS5463623A (en) 1977-10-29 1977-10-29 Screen display system

Publications (1)

Publication Number Publication Date
JPS5463623A true JPS5463623A (en) 1979-05-22

Family

ID=15021037

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12989677A Pending JPS5463623A (en) 1977-10-29 1977-10-29 Screen display system

Country Status (1)

Country Link
JP (1) JPS5463623A (en)

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