JPS5457804A - Two-way information transmitter-receiver - Google Patents
Two-way information transmitter-receiverInfo
- Publication number
- JPS5457804A JPS5457804A JP12421477A JP12421477A JPS5457804A JP S5457804 A JPS5457804 A JP S5457804A JP 12421477 A JP12421477 A JP 12421477A JP 12421477 A JP12421477 A JP 12421477A JP S5457804 A JPS5457804 A JP S5457804A
- Authority
- JP
- Japan
- Prior art keywords
- information
- circuit
- receiver
- transmitter
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
- H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Bidirectional Digital Transmission (AREA)
Abstract
PURPOSE:To obtain a two-way information transmitter-receiver which is able to transmit and receive information with exact synchronism at a low error rate by effectively removing the sneak component of hybrid circuit. CONSTITUTION:Compensator circuit 13 is connected to the information output terminal of hybrid circuit 11. This circuit 13 is constituted as follows. An information from circuit 11 is inputted to sampling circuit 18, which samples the information on the basis of a clock from transmitter 12, and its sampled value is coded via A/D converter 19 and written to memory 20. In addition, analog switch 21 controlling the writing of sampling signals is switched by switch control circuit 22. During the transmission and reception of information through communication line 11, a signal stored in memory 20 is read out via converter 23, filtered via filter 24, and supplied to subtracter 25, where it is subtracted from a received signal, so that the sneak component of the information will be canceled.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12421477A JPS5457804A (en) | 1977-10-17 | 1977-10-17 | Two-way information transmitter-receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12421477A JPS5457804A (en) | 1977-10-17 | 1977-10-17 | Two-way information transmitter-receiver |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5457804A true JPS5457804A (en) | 1979-05-10 |
Family
ID=14879809
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12421477A Pending JPS5457804A (en) | 1977-10-17 | 1977-10-17 | Two-way information transmitter-receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5457804A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57211865A (en) * | 1981-06-22 | 1982-12-25 | Toa Tokushu Denki Kk | Bi-directional duplex communication device |
-
1977
- 1977-10-17 JP JP12421477A patent/JPS5457804A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57211865A (en) * | 1981-06-22 | 1982-12-25 | Toa Tokushu Denki Kk | Bi-directional duplex communication device |
JPS6321386B2 (en) * | 1981-06-22 | 1988-05-06 | Toa Electric Co Ltd |
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