JPS545672B2 - - Google Patents
Info
- Publication number
- JPS545672B2 JPS545672B2 JP2533572A JP2533572A JPS545672B2 JP S545672 B2 JPS545672 B2 JP S545672B2 JP 2533572 A JP2533572 A JP 2533572A JP 2533572 A JP2533572 A JP 2533572A JP S545672 B2 JPS545672 B2 JP S545672B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2533572A JPS545672B2 (en:Method) | 1972-03-08 | 1972-03-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2533572A JPS545672B2 (en:Method) | 1972-03-08 | 1972-03-08 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4891978A JPS4891978A (en:Method) | 1973-11-29 |
| JPS545672B2 true JPS545672B2 (en:Method) | 1979-03-19 |
Family
ID=12163038
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2533572A Expired JPS545672B2 (en:Method) | 1972-03-08 | 1972-03-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS545672B2 (en:Method) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5147377A (en) * | 1974-10-21 | 1976-04-22 | Nippon Electric Co | Handotaisochino seizoho |
-
1972
- 1972-03-08 JP JP2533572A patent/JPS545672B2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS4891978A (en:Method) | 1973-11-29 |