JPS5452933A - Writing device - Google Patents

Writing device

Info

Publication number
JPS5452933A
JPS5452933A JP11958377A JP11958377A JPS5452933A JP S5452933 A JPS5452933 A JP S5452933A JP 11958377 A JP11958377 A JP 11958377A JP 11958377 A JP11958377 A JP 11958377A JP S5452933 A JPS5452933 A JP S5452933A
Authority
JP
Japan
Prior art keywords
writing
data
sequence
coincidence
written
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11958377A
Other languages
Japanese (ja)
Inventor
Toshio Nakamura
Isao Ichimura
Hisashi Nanba
Fumio Kawamata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11958377A priority Critical patent/JPS5452933A/en
Publication of JPS5452933A publication Critical patent/JPS5452933A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits

Landscapes

  • Read Only Memory (AREA)

Abstract

PURPOSE:To enhance the writing yield as well as to prevent the deterioration of the writing element for the device which controls the writing sequence of the information into the electronic circuit parts, by setting the writing sequence in consideration of the writing conditions such as the heat distribution and the like. CONSTITUTION:Data input means 4 which supplies the address information corresponding to plural writing data for sriting purpose and the writing data which indicate the writing position with no overlap to written element 1 which is impossible to rewrite. And the information is supplied to writing means 2. The following means are provided to means 2: storing means 22 to store the address information; means 23 to store the address which is delivered in the prescribed writing sequence; and comparing maeans 25 which compares the addresses of means 22 and 23 to each other. When a coincidence is obtained for the comparison result, the writing data is set to writing register 26. And the data is written in element 1 from parallel- series converting means 27 based on the writing sequence. The coincidence of the data is obtained via comparing means 3 between the data written and register 26. Then this coincidence is informed to control means 24 to carry out the following action.
JP11958377A 1977-10-04 1977-10-04 Writing device Pending JPS5452933A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11958377A JPS5452933A (en) 1977-10-04 1977-10-04 Writing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11958377A JPS5452933A (en) 1977-10-04 1977-10-04 Writing device

Publications (1)

Publication Number Publication Date
JPS5452933A true JPS5452933A (en) 1979-04-25

Family

ID=14764945

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11958377A Pending JPS5452933A (en) 1977-10-04 1977-10-04 Writing device

Country Status (1)

Country Link
JP (1) JPS5452933A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2365488A1 (en) 2010-03-08 2011-09-14 Fujitsu Semiconductor Limited Apparatus and method for testing semiconductor integrated circuits, and a non-transitory computer-readable medium having a semiconductor integrated circuit testing program

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2365488A1 (en) 2010-03-08 2011-09-14 Fujitsu Semiconductor Limited Apparatus and method for testing semiconductor integrated circuits, and a non-transitory computer-readable medium having a semiconductor integrated circuit testing program
US8656232B2 (en) 2010-03-08 2014-02-18 Fujitsu Semiconductor Limited Apparatus and method for testing semiconductor integrated circuits, and a non-transitory computer-readable medium having a semiconductor integrated circuit testing program

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