JPS544543A - Computer system - Google Patents

Computer system

Info

Publication number
JPS544543A
JPS544543A JP6964877A JP6964877A JPS544543A JP S544543 A JPS544543 A JP S544543A JP 6964877 A JP6964877 A JP 6964877A JP 6964877 A JP6964877 A JP 6964877A JP S544543 A JPS544543 A JP S544543A
Authority
JP
Japan
Prior art keywords
computer system
cash
decrase
transmittion
capacity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6964877A
Other languages
Japanese (ja)
Other versions
JPS5927994B2 (en
Inventor
Tatsuo Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP52069648A priority Critical patent/JPS5927994B2/en
Publication of JPS544543A publication Critical patent/JPS544543A/en
Publication of JPS5927994B2 publication Critical patent/JPS5927994B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To decrase the occurrence frequency of CQ (approximately 1/4 as much as conventional one), to make the processing time of CPU long, and to improve the capacity, by transmittion cash-cancellation request CQ once within the range of one cash block.
COPYRIGHT: (C)1979,JPO&Japio
JP52069648A 1977-06-13 1977-06-13 computer system Expired JPS5927994B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52069648A JPS5927994B2 (en) 1977-06-13 1977-06-13 computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52069648A JPS5927994B2 (en) 1977-06-13 1977-06-13 computer system

Publications (2)

Publication Number Publication Date
JPS544543A true JPS544543A (en) 1979-01-13
JPS5927994B2 JPS5927994B2 (en) 1984-07-10

Family

ID=13408864

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52069648A Expired JPS5927994B2 (en) 1977-06-13 1977-06-13 computer system

Country Status (1)

Country Link
JP (1) JPS5927994B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55122284A (en) * 1979-03-08 1980-09-19 Nec Corp Cash memory control unit
JPS6158060A (en) * 1984-07-27 1986-03-25 Fujitsu Ltd Sequential control system
JPS61221845A (en) * 1985-03-05 1986-10-02 Fujitsu Ltd Producing system for invalidated address of buffer memory

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55122284A (en) * 1979-03-08 1980-09-19 Nec Corp Cash memory control unit
JPS6158060A (en) * 1984-07-27 1986-03-25 Fujitsu Ltd Sequential control system
JPS61221845A (en) * 1985-03-05 1986-10-02 Fujitsu Ltd Producing system for invalidated address of buffer memory

Also Published As

Publication number Publication date
JPS5927994B2 (en) 1984-07-10

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