JPS5441857B2 - - Google Patents
Info
- Publication number
- JPS5441857B2 JPS5441857B2 JP12740772A JP12740772A JPS5441857B2 JP S5441857 B2 JPS5441857 B2 JP S5441857B2 JP 12740772 A JP12740772 A JP 12740772A JP 12740772 A JP12740772 A JP 12740772A JP S5441857 B2 JPS5441857 B2 JP S5441857B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12740772A JPS5441857B2 (en:Method) | 1972-12-19 | 1972-12-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12740772A JPS5441857B2 (en:Method) | 1972-12-19 | 1972-12-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4984329A JPS4984329A (en:Method) | 1974-08-13 |
| JPS5441857B2 true JPS5441857B2 (en:Method) | 1979-12-11 |
Family
ID=14959205
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12740772A Expired JPS5441857B2 (en:Method) | 1972-12-19 | 1972-12-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5441857B2 (en:Method) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10706951B2 (en) | 2018-03-23 | 2020-07-07 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit including a memory macro |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5465427A (en) * | 1977-11-02 | 1979-05-26 | Citizen Watch Co Ltd | Solenoid driving circuit for dot printer |
| JPS5615370A (en) * | 1979-07-18 | 1981-02-14 | Tokyo Electric Co Ltd | Driving method for dot printer |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4515097Y1 (en:Method) * | 1967-05-13 | 1970-06-24 |
-
1972
- 1972-12-19 JP JP12740772A patent/JPS5441857B2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10706951B2 (en) | 2018-03-23 | 2020-07-07 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit including a memory macro |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS4984329A (en:Method) | 1974-08-13 |