JPS5437474B1 - - Google Patents
Info
- Publication number
- JPS5437474B1 JPS5437474B1 JP4007168A JP4007168A JPS5437474B1 JP S5437474 B1 JPS5437474 B1 JP S5437474B1 JP 4007168 A JP4007168 A JP 4007168A JP 4007168 A JP4007168 A JP 4007168A JP S5437474 B1 JPS5437474 B1 JP S5437474B1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H10W40/10—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
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- H10P95/00—
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- H10W72/60—
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- H10W72/07236—
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- H10W72/877—
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Dicing (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4007168A JPS5437474B1 (enExample) | 1968-06-10 | 1968-06-10 | |
| US831041A US3670404A (en) | 1968-06-10 | 1969-06-06 | Method of fabricating a semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4007168A JPS5437474B1 (enExample) | 1968-06-10 | 1968-06-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5437474B1 true JPS5437474B1 (enExample) | 1979-11-15 |
Family
ID=12570681
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4007168A Pending JPS5437474B1 (enExample) | 1968-06-10 | 1968-06-10 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US3670404A (enExample) |
| JP (1) | JPS5437474B1 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3846825A (en) * | 1971-02-05 | 1974-11-05 | Philips Corp | Semiconductor device having conducting pins and cooling member |
| US4004955A (en) * | 1973-05-24 | 1977-01-25 | General Motors Corporation | Positive selective nickel alignment system |
| US3895429A (en) * | 1974-05-09 | 1975-07-22 | Rca Corp | Method of making a semiconductor device |
| US3936866A (en) * | 1974-06-14 | 1976-02-03 | Northrop Corporation | Heat conductive mounting and connection of semiconductor chips in micro-circuitry on a substrate |
| US3995310A (en) * | 1974-12-23 | 1976-11-30 | General Electric Company | Semiconductor assembly including mounting plate with recessed periphery |
| US4023260A (en) * | 1976-03-05 | 1977-05-17 | Bell Telephone Laboratories, Incorporated | Method of manufacturing semiconductor diodes for use in millimeter-wave circuits |
| US4023258A (en) * | 1976-03-05 | 1977-05-17 | Bell Telephone Laboratories, Incorporated | Method of manufacturing semiconductor diodes for use in millimeter-wave circuits |
| US4357540A (en) * | 1980-12-19 | 1982-11-02 | International Business Machines Corporation | Semiconductor device array mask inspection method and apparatus |
| US4534804A (en) * | 1984-06-14 | 1985-08-13 | International Business Machines Corporation | Laser process for forming identically positioned alignment marks on the opposite sides of a semiconductor wafer |
| FR2584236B1 (fr) * | 1985-06-26 | 1988-04-29 | Bull Sa | Procede de montage d'un circuit integre sur un support, dispositif en resultant et son application a une carte a microcircuits electroniques |
| FR2584235B1 (fr) * | 1985-06-26 | 1988-04-22 | Bull Sa | Procede de montage d'un circuit integre sur un support, dispositif en resultant et son application a une carte a microcircuits electroniques |
| US5504338A (en) * | 1993-06-30 | 1996-04-02 | The United States Of America As Represented By The Secretary Of The Navy | Apparatus and method using low-voltage and/or low-current scanning probe lithography |
| US5942805A (en) * | 1996-12-20 | 1999-08-24 | Intel Corporation | Fiducial for aligning an integrated circuit die |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3447235A (en) * | 1967-07-21 | 1969-06-03 | Raytheon Co | Isolated cathode array semiconductor |
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1968
- 1968-06-10 JP JP4007168A patent/JPS5437474B1/ja active Pending
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1969
- 1969-06-06 US US831041A patent/US3670404A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US3670404A (en) | 1972-06-20 |