JPS5433498B2 - - Google Patents

Info

Publication number
JPS5433498B2
JPS5433498B2 JP9437172A JP9437172A JPS5433498B2 JP S5433498 B2 JPS5433498 B2 JP S5433498B2 JP 9437172 A JP9437172 A JP 9437172A JP 9437172 A JP9437172 A JP 9437172A JP S5433498 B2 JPS5433498 B2 JP S5433498B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9437172A
Other languages
Japanese (ja)
Other versions
JPS4951834A (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9437172A priority Critical patent/JPS5433498B2/ja
Priority to US398339A priority patent/US3866188A/en
Priority to DE19732347228 priority patent/DE2347228A1/de
Priority to IT29122/73A priority patent/IT993311B/it
Priority to FR7333633A priority patent/FR2200581B1/fr
Publication of JPS4951834A publication Critical patent/JPS4951834A/ja
Publication of JPS5433498B2 publication Critical patent/JPS5433498B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
JP9437172A 1972-09-19 1972-09-19 Expired JPS5433498B2 (en:Method)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP9437172A JPS5433498B2 (en:Method) 1972-09-19 1972-09-19
US398339A US3866188A (en) 1972-09-19 1973-09-18 Memory circuit
DE19732347228 DE2347228A1 (de) 1972-09-19 1973-09-19 Speicherschaltung
IT29122/73A IT993311B (it) 1972-09-19 1973-09-19 Circuito di memoria per elaboratori elettronici
FR7333633A FR2200581B1 (en:Method) 1972-09-19 1973-09-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9437172A JPS5433498B2 (en:Method) 1972-09-19 1972-09-19

Publications (2)

Publication Number Publication Date
JPS4951834A JPS4951834A (en:Method) 1974-05-20
JPS5433498B2 true JPS5433498B2 (en:Method) 1979-10-20

Family

ID=14108442

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9437172A Expired JPS5433498B2 (en:Method) 1972-09-19 1972-09-19

Country Status (5)

Country Link
US (1) US3866188A (en:Method)
JP (1) JPS5433498B2 (en:Method)
DE (1) DE2347228A1 (en:Method)
FR (1) FR2200581B1 (en:Method)
IT (1) IT993311B (en:Method)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4286330A (en) * 1976-04-07 1981-08-25 Isaacson Joel D Autonomic string-manipulation system
JPS55132593A (en) * 1979-04-02 1980-10-15 Fujitsu Ltd Refresh control method for memory unit
JPS55135392A (en) * 1979-04-04 1980-10-22 Nec Corp Memory circuit
US4758993A (en) * 1984-11-19 1988-07-19 Fujitsu Limited Random access memory device formed on a semiconductor substrate having an array of memory cells divided into sub-arrays
US6396744B1 (en) * 2000-04-25 2002-05-28 Multi Level Memory Technology Flash memory with dynamic refresh
US7079422B1 (en) 2000-04-25 2006-07-18 Samsung Electronics Co., Ltd. Periodic refresh operations for non-volatile multiple-bit-per-cell memory

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3748651A (en) * 1972-02-16 1973-07-24 Cogar Corp Refresh control for add-on semiconductor memory
US3790961A (en) * 1972-06-09 1974-02-05 Advanced Memory Syst Inc Random access dynamic semiconductor memory system

Also Published As

Publication number Publication date
JPS4951834A (en:Method) 1974-05-20
DE2347228A1 (de) 1974-04-11
IT993311B (it) 1975-09-30
FR2200581A1 (en:Method) 1974-04-19
US3866188A (en) 1975-02-11
FR2200581B1 (en:Method) 1977-05-27

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