Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/42—Wire connectors; Manufacturing methods related thereto
  • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
  • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/0001—Technical content checked by a classifier
  • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

• Engineering & Computer Science (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Priority Applications (1)

Applications Claiming Priority (1)

Publications (2)

Family

ID=28353813

Family Applications (1)

Country Status (1)

Families Citing this family (2)

Family Cites Families (3)

• 1974
  • 1974-09-28 JP JP1974117622U patent/JPS5433430Y2/ja not_active Expired

Also Published As

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