JPS5433426Y2 - - Google Patents

Info

Publication number
JPS5433426Y2
JPS5433426Y2 JP1973101578U JP10157873U JPS5433426Y2 JP S5433426 Y2 JPS5433426 Y2 JP S5433426Y2 JP 1973101578 U JP1973101578 U JP 1973101578U JP 10157873 U JP10157873 U JP 10157873U JP S5433426 Y2 JPS5433426 Y2 JP S5433426Y2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1973101578U
Other languages
Japanese (ja)
Other versions
JPS5048549U (cs
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1973101578U priority Critical patent/JPS5433426Y2/ja
Publication of JPS5048549U publication Critical patent/JPS5048549U/ja
Application granted granted Critical
Publication of JPS5433426Y2 publication Critical patent/JPS5433426Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10122Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/10125Reinforcing structures
    • H01L2224/10126Bump collar

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Static Random-Access Memory (AREA)
  • Wire Bonding (AREA)
JP1973101578U 1973-08-31 1973-08-31 Expired JPS5433426Y2 (cs)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1973101578U JPS5433426Y2 (cs) 1973-08-31 1973-08-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1973101578U JPS5433426Y2 (cs) 1973-08-31 1973-08-31

Publications (2)

Publication Number Publication Date
JPS5048549U JPS5048549U (cs) 1975-05-13
JPS5433426Y2 true JPS5433426Y2 (cs) 1979-10-15

Family

ID=28308801

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1973101578U Expired JPS5433426Y2 (cs) 1973-08-31 1973-08-31

Country Status (1)

Country Link
JP (1) JPS5433426Y2 (cs)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS542548B2 (cs) * 1972-02-26 1979-02-08

Also Published As

Publication number Publication date
JPS5048549U (cs) 1975-05-13

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