JPS5432039A - 1-chip arithmetic device - Google Patents

1-chip arithmetic device

Info

Publication number
JPS5432039A
JPS5432039A JP9807777A JP9807777A JPS5432039A JP S5432039 A JPS5432039 A JP S5432039A JP 9807777 A JP9807777 A JP 9807777A JP 9807777 A JP9807777 A JP 9807777A JP S5432039 A JPS5432039 A JP S5432039A
Authority
JP
Japan
Prior art keywords
arithmetic device
chip arithmetic
chip
fault
masking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9807777A
Other languages
Japanese (ja)
Other versions
JPS6020766B2 (en
Inventor
Hiroshi Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP52098077A priority Critical patent/JPS6020766B2/en
Publication of JPS5432039A publication Critical patent/JPS5432039A/en
Publication of JPS6020766B2 publication Critical patent/JPS6020766B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Logic Circuits (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To ensure a continuous use of the arithmetic device by masking the fault area in case some fault takes place at part within the arithmetic device.
JP52098077A 1977-08-16 1977-08-16 1 chip arithmetic unit Expired JPS6020766B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52098077A JPS6020766B2 (en) 1977-08-16 1977-08-16 1 chip arithmetic unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52098077A JPS6020766B2 (en) 1977-08-16 1977-08-16 1 chip arithmetic unit

Publications (2)

Publication Number Publication Date
JPS5432039A true JPS5432039A (en) 1979-03-09
JPS6020766B2 JPS6020766B2 (en) 1985-05-23

Family

ID=14210274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52098077A Expired JPS6020766B2 (en) 1977-08-16 1977-08-16 1 chip arithmetic unit

Country Status (1)

Country Link
JP (1) JPS6020766B2 (en)

Also Published As

Publication number Publication date
JPS6020766B2 (en) 1985-05-23

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