JPS5430617B2 - - Google Patents
Info
- Publication number
- JPS5430617B2 JPS5430617B2 JP10092674A JP10092674A JPS5430617B2 JP S5430617 B2 JPS5430617 B2 JP S5430617B2 JP 10092674 A JP10092674 A JP 10092674A JP 10092674 A JP10092674 A JP 10092674A JP S5430617 B2 JPS5430617 B2 JP S5430617B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356017—Bistable circuits using additional transistors in the input circuit
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/02—Digital computers in general; Data processing equipment in general manually operated with input through keyboard and computation using a built-in program, e.g. pocket calculators
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356008—Bistable circuits ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Electronic Switches (AREA)
- Calculators And Similar Devices (AREA)
- Input From Keyboards Or The Like (AREA)
- Logic Circuits (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10092674A JPS5430617B2 (en:Method) | 1974-09-04 | 1974-09-04 | |
| DE19752538207 DE2538207A1 (de) | 1974-09-04 | 1975-08-27 | Signalgenerator |
| US05/608,736 US3983420A (en) | 1974-09-04 | 1975-08-28 | Signal generator circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10092674A JPS5430617B2 (en:Method) | 1974-09-04 | 1974-09-04 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5128733A JPS5128733A (en:Method) | 1976-03-11 |
| JPS5430617B2 true JPS5430617B2 (en:Method) | 1979-10-02 |
Family
ID=14286942
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10092674A Expired JPS5430617B2 (en:Method) | 1974-09-04 | 1974-09-04 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US3983420A (en:Method) |
| JP (1) | JPS5430617B2 (en:Method) |
| DE (1) | DE2538207A1 (en:Method) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4216395A (en) * | 1978-01-16 | 1980-08-05 | Bell Telephone Laboratories, Incorporated | Detector circuitry |
| US4296340A (en) * | 1979-08-27 | 1981-10-20 | Intel Corporation | Initializing circuit for MOS integrated circuits |
| US4395645A (en) * | 1980-12-05 | 1983-07-26 | International Telephone And Telegraph Corporation | Mosfet logic inverter buffer circuit for integrated circuits |
| JPS5818416A (ja) * | 1981-07-22 | 1983-02-03 | Kanebo Ltd | 絹織物調ポリエステル編物用複合フイラメント |
| US4447746A (en) * | 1981-12-31 | 1984-05-08 | International Business Machines Corporation | Digital photodetectors |
| US5045723A (en) * | 1990-07-31 | 1991-09-03 | International Business Machines Corporation | Multiple input CMOS logic circuits |
| US5317209A (en) * | 1991-08-29 | 1994-05-31 | National Semiconductor Corporation | Dynamic three-state bussing capability in a configurable logic array |
| JP4172378B2 (ja) * | 2003-11-14 | 2008-10-29 | 沖電気工業株式会社 | パワーオンリセット回路 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3510689A (en) * | 1966-11-01 | 1970-05-05 | Massachusetts Inst Technology | Bistable flip-flop circuit with memory |
| US3753011A (en) * | 1972-03-13 | 1973-08-14 | Intel Corp | Power supply settable bi-stable circuit |
| US3858061A (en) * | 1972-12-27 | 1974-12-31 | Ibm | Multiple size gates on fet chips |
| JPS49116939A (en:Method) * | 1973-03-09 | 1974-11-08 | ||
| US3870901A (en) * | 1973-12-10 | 1975-03-11 | Gen Instrument Corp | Method and apparatus for maintaining the charge on a storage node of a mos circuit |
| US3895239A (en) * | 1973-12-26 | 1975-07-15 | Motorola Inc | MOS power-on reset circuit |
| US3902082A (en) * | 1974-02-11 | 1975-08-26 | Mostek Corp | Dynamic data input latch and decoder |
-
1974
- 1974-09-04 JP JP10092674A patent/JPS5430617B2/ja not_active Expired
-
1975
- 1975-08-27 DE DE19752538207 patent/DE2538207A1/de active Pending
- 1975-08-28 US US05/608,736 patent/US3983420A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US3983420A (en) | 1976-09-28 |
| DE2538207A1 (de) | 1976-04-01 |
| JPS5128733A (en:Method) | 1976-03-11 |