JPS5428706B2 - - Google Patents
Info
- Publication number
- JPS5428706B2 JPS5428706B2 JP2422972A JP2422972A JPS5428706B2 JP S5428706 B2 JPS5428706 B2 JP S5428706B2 JP 2422972 A JP2422972 A JP 2422972A JP 2422972 A JP2422972 A JP 2422972A JP S5428706 B2 JPS5428706 B2 JP S5428706B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Logic Circuits (AREA)
- Networks Using Active Elements (AREA)
- Dc Digital Transmission (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2422972A JPS5428706B2 (en:Method) | 1972-03-09 | 1972-03-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2422972A JPS5428706B2 (en:Method) | 1972-03-09 | 1972-03-09 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4891487A JPS4891487A (en:Method) | 1973-11-28 |
| JPS5428706B2 true JPS5428706B2 (en:Method) | 1979-09-18 |
Family
ID=12132421
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2422972A Expired JPS5428706B2 (en:Method) | 1972-03-09 | 1972-03-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5428706B2 (en:Method) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5724124A (en) * | 1980-07-18 | 1982-02-08 | Nec Corp | Semiconductor intergrated circuit |
-
1972
- 1972-03-09 JP JP2422972A patent/JPS5428706B2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS4891487A (en:Method) | 1973-11-28 |