JPS5428561A - Circuit for adjusting signal mean frequency applied to output device - Google Patents

Circuit for adjusting signal mean frequency applied to output device

Info

Publication number
JPS5428561A
JPS5428561A JP9469178A JP9469178A JPS5428561A JP S5428561 A JPS5428561 A JP S5428561A JP 9469178 A JP9469178 A JP 9469178A JP 9469178 A JP9469178 A JP 9469178A JP S5428561 A JPS5428561 A JP S5428561A
Authority
JP
Japan
Prior art keywords
circuit
output device
adjusting signal
frequency applied
mean frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9469178A
Other languages
Japanese (ja)
Inventor
Rei Deyufu Donarudo
Heiden Jiyonsuton Jieimusu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Camera and Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Camera and Instrument Corp filed Critical Fairchild Camera and Instrument Corp
Publication of JPS5428561A publication Critical patent/JPS5428561A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G04—HOROLOGY
    • G04G—ELECTRONIC TIME-PIECES
    • G04G3/00—Producing timing pulses
    • G04G3/02—Circuits for deriving low frequency timing pulses from pulses of higher frequency
    • G04G3/022—Circuits for deriving low frequency timing pulses from pulses of higher frequency the desired number of pulses per unit of time being obtained by adding to or substracting from a pulse train one or more pulses

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Clocks (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
JP9469178A 1977-08-04 1978-08-04 Circuit for adjusting signal mean frequency applied to output device Pending JPS5428561A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US82167477A 1977-08-04 1977-08-04

Publications (1)

Publication Number Publication Date
JPS5428561A true JPS5428561A (en) 1979-03-03

Family

ID=25234011

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9469178A Pending JPS5428561A (en) 1977-08-04 1978-08-04 Circuit for adjusting signal mean frequency applied to output device

Country Status (3)

Country Link
JP (1) JPS5428561A (en)
DE (1) DE2833653A1 (en)
GB (1) GB2002157A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5868322A (en) * 1981-10-19 1983-04-23 Matsushita Electric Ind Co Ltd Correcting device for oscillation frequency

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10303405A1 (en) * 2003-01-29 2004-08-19 Infineon Technologies Ag Device and method for frequency synthesis
EP2738629A1 (en) * 2012-11-30 2014-06-04 EM Microelectronic-Marin SA High-precision electronic clock movement and method for adjusting a time base

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5868322A (en) * 1981-10-19 1983-04-23 Matsushita Electric Ind Co Ltd Correcting device for oscillation frequency

Also Published As

Publication number Publication date
DE2833653A1 (en) 1979-02-15
GB2002157A (en) 1979-02-14

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