JPS5423567U - - Google Patents

Info

Publication number
JPS5423567U
JPS5423567U JP9659977U JP9659977U JPS5423567U JP S5423567 U JPS5423567 U JP S5423567U JP 9659977 U JP9659977 U JP 9659977U JP 9659977 U JP9659977 U JP 9659977U JP S5423567 U JPS5423567 U JP S5423567U
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9659977U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9659977U priority Critical patent/JPS5423567U/ja
Publication of JPS5423567U publication Critical patent/JPS5423567U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
JP9659977U 1977-07-20 1977-07-20 Pending JPS5423567U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9659977U JPS5423567U (en) 1977-07-20 1977-07-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9659977U JPS5423567U (en) 1977-07-20 1977-07-20

Publications (1)

Publication Number Publication Date
JPS5423567U true JPS5423567U (en) 1979-02-16

Family

ID=29030632

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9659977U Pending JPS5423567U (en) 1977-07-20 1977-07-20

Country Status (1)

Country Link
JP (1) JPS5423567U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50125690A (en) * 1974-03-20 1975-10-02
JPS51148390A (en) * 1975-06-16 1976-12-20 Seiko Epson Corp Solar battery

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50125690A (en) * 1974-03-20 1975-10-02
JPS51148390A (en) * 1975-06-16 1976-12-20 Seiko Epson Corp Solar battery

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