JPS5419351A - Logic circuit of low power - Google Patents
Logic circuit of low powerInfo
- Publication number
- JPS5419351A JPS5419351A JP8484277A JP8484277A JPS5419351A JP S5419351 A JPS5419351 A JP S5419351A JP 8484277 A JP8484277 A JP 8484277A JP 8484277 A JP8484277 A JP 8484277A JP S5419351 A JPS5419351 A JP S5419351A
- Authority
- JP
- Japan
- Prior art keywords
- logic circuit
- low power
- output terminal
- time
- circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09432—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors with coupled sources or source coupled logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
Abstract
PURPOSE:To obtain the logic circuit of high speed and low power consumption, by connecting the output terminal of two circuits in which they are conductive by a given time within the leading time and trailing time of the output terminal of a logic circuit, to the output terminal of the logic circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8484277A JPS5419351A (en) | 1977-07-14 | 1977-07-14 | Logic circuit of low power |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8484277A JPS5419351A (en) | 1977-07-14 | 1977-07-14 | Logic circuit of low power |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5419351A true JPS5419351A (en) | 1979-02-14 |
Family
ID=13842038
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8484277A Pending JPS5419351A (en) | 1977-07-14 | 1977-07-14 | Logic circuit of low power |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5419351A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62141761U (en) * | 1986-02-28 | 1987-09-07 | ||
JPH0270120A (en) * | 1988-09-05 | 1990-03-09 | Nec Corp | Output circuit |
-
1977
- 1977-07-14 JP JP8484277A patent/JPS5419351A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62141761U (en) * | 1986-02-28 | 1987-09-07 | ||
JPH0270120A (en) * | 1988-09-05 | 1990-03-09 | Nec Corp | Output circuit |
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