JPS54162949A - Bit shift detection circuit - Google Patents

Bit shift detection circuit

Info

Publication number
JPS54162949A
JPS54162949A JP7185078A JP7185078A JPS54162949A JP S54162949 A JPS54162949 A JP S54162949A JP 7185078 A JP7185078 A JP 7185078A JP 7185078 A JP7185078 A JP 7185078A JP S54162949 A JPS54162949 A JP S54162949A
Authority
JP
Japan
Prior art keywords
signal
pulse
bit shift
delivers
constant current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7185078A
Other languages
Japanese (ja)
Other versions
JPS6022404B2 (en
Inventor
Michio Kawase
Tadahiro Wada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7185078A priority Critical patent/JPS6022404B2/en
Publication of JPS54162949A publication Critical patent/JPS54162949A/en
Publication of JPS6022404B2 publication Critical patent/JPS6022404B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Digital Magnetic Recording (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE: To obtain a low-cost bit shift detection circuit with a simple constitution by installing the constant current integrating circuit, the reference value circuit of the slice level output and the circuit which delivers the bit shift allowance value excess signal at the slice level exceeding time respectively.
CONSTITUTION: Pulse signal S1 showing the peak of the reading signal of the magnetic tape is supplied to the constant current integrating circuit consisting of AND gate 41, transistor Tr42, capacitor 43 and constant current source 55 each. And thus the pulse of the data phase is drawn out, and the saw-tooth wave S3 is reset. Then signal S1 is supplied to comparators 52 and 53. On the other hand, the average value of signal S3 is generated via Tr44, resistances 45 and 46 plus capacitor 47, and slice levels S5 and S6 are produced by operational amplifier 48 and resistances 49∼51. When pulse S11 among signal S1 is shifted to S12, the amplitude of signal S3 is increased. And S3 is reset when pulse S12 arrives beyond level S6. Comparator 52 delivers signal S8, triggers one-shot multi 54 and delivers trigger signal S91 to give the alarm display showing that the bit shift amount has exceeded the allowance level.
COPYRIGHT: (C)1979,JPO&Japio
JP7185078A 1978-06-14 1978-06-14 Bit shift detection circuit Expired JPS6022404B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7185078A JPS6022404B2 (en) 1978-06-14 1978-06-14 Bit shift detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7185078A JPS6022404B2 (en) 1978-06-14 1978-06-14 Bit shift detection circuit

Publications (2)

Publication Number Publication Date
JPS54162949A true JPS54162949A (en) 1979-12-25
JPS6022404B2 JPS6022404B2 (en) 1985-06-01

Family

ID=13472417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7185078A Expired JPS6022404B2 (en) 1978-06-14 1978-06-14 Bit shift detection circuit

Country Status (1)

Country Link
JP (1) JPS6022404B2 (en)

Also Published As

Publication number Publication date
JPS6022404B2 (en) 1985-06-01

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