JPS54133856A - Timing generating circuit - Google Patents

Timing generating circuit

Info

Publication number
JPS54133856A
JPS54133856A JP4120178A JP4120178A JPS54133856A JP S54133856 A JPS54133856 A JP S54133856A JP 4120178 A JP4120178 A JP 4120178A JP 4120178 A JP4120178 A JP 4120178A JP S54133856 A JPS54133856 A JP S54133856A
Authority
JP
Japan
Prior art keywords
timing
control circuit
reset
generating circuit
reference clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4120178A
Other languages
Japanese (ja)
Inventor
Sadao Mizokawa
Takehiko Nishida
Shigeru Fukazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4120178A priority Critical patent/JPS54133856A/en
Publication of JPS54133856A publication Critical patent/JPS54133856A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to stop and reset a computer timing pulse without stopping a reference clock, by allowing a control circuit to expand and reset the timing pulse.
CONSTITUTION: To generate normal operation timing, a stop signal from control circuit 3 is OFF, timing generating circuit 2 is allowed to operate, and timing generating circuit 4 and control circuit 5 are both inhibited from operating, thereby generating timing pulses (b), (c), (d), and (e). Under the condition that timing pulses should be expanded in the prescribed period, control circuit 3 expands and resets timing pulses synchronizing with a reference clock. Consequently, it is possible to stop and reset computer timing pulses without stopping the reference clock.
COPYRIGHT: (C)1979,JPO&Japio
JP4120178A 1978-04-10 1978-04-10 Timing generating circuit Pending JPS54133856A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4120178A JPS54133856A (en) 1978-04-10 1978-04-10 Timing generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4120178A JPS54133856A (en) 1978-04-10 1978-04-10 Timing generating circuit

Publications (1)

Publication Number Publication Date
JPS54133856A true JPS54133856A (en) 1979-10-17

Family

ID=12601796

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4120178A Pending JPS54133856A (en) 1978-04-10 1978-04-10 Timing generating circuit

Country Status (1)

Country Link
JP (1) JPS54133856A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4913641B1 (en) * 1970-12-28 1974-04-02
JPS49130636A (en) * 1973-04-13 1974-12-14
JPS506295A (en) * 1973-05-17 1975-01-22
JPS52113644A (en) * 1976-03-19 1977-09-22 Nec Corp Microprogram control unit
JPS52116035A (en) * 1976-03-26 1977-09-29 Hitachi Ltd Data processing unit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4913641B1 (en) * 1970-12-28 1974-04-02
JPS49130636A (en) * 1973-04-13 1974-12-14
JPS506295A (en) * 1973-05-17 1975-01-22
JPS52113644A (en) * 1976-03-19 1977-09-22 Nec Corp Microprogram control unit
JPS52116035A (en) * 1976-03-26 1977-09-29 Hitachi Ltd Data processing unit

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