JPS54115098A - Integrated circuit - Google Patents

Integrated circuit

Info

Publication number
JPS54115098A
JPS54115098A JP2291078A JP2291078A JPS54115098A JP S54115098 A JPS54115098 A JP S54115098A JP 2291078 A JP2291078 A JP 2291078A JP 2291078 A JP2291078 A JP 2291078A JP S54115098 A JPS54115098 A JP S54115098A
Authority
JP
Japan
Prior art keywords
section
memory
waveform
data
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2291078A
Other languages
Japanese (ja)
Inventor
Katsumi Yamamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP2291078A priority Critical patent/JPS54115098A/en
Publication of JPS54115098A publication Critical patent/JPS54115098A/en
Pending legal-status Critical Current

Links

Landscapes

  • Alarm Systems (AREA)

Abstract

PURPOSE: To enable to develop the alarm tone having various variations, by forming the integrated circuit with the reference signal oscillation section, memory section, frequency demultiplier, waveform control section and operation control section.
CONSTITUTION: The integrated circuit consists of the oscillation section 1 generating reference signal, memory 2 storing the frequency dividing ratio data and the waveform data, frequency demultiplication section 3 demultiplying the signal from the oscillation section 1 based on the frequency demultiplication data from the memory section 2, waveform control section 4 controlling the waveform of the output signal of the frequency demultiplication section 3 based on the waveform data from the memory 2, and operation control section 7 controlling the start or stop of the data selection and operation of the memory 2 according to the signal from the detection section detecting the condition of the objective of detection. Further, the memory 2 can simply be replaced and various memory sections can be prepared, allowing to produce various alarm tones and to obtain wider applications.
COPYRIGHT: (C)1979,JPO&Japio
JP2291078A 1978-02-28 1978-02-28 Integrated circuit Pending JPS54115098A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2291078A JPS54115098A (en) 1978-02-28 1978-02-28 Integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2291078A JPS54115098A (en) 1978-02-28 1978-02-28 Integrated circuit

Publications (1)

Publication Number Publication Date
JPS54115098A true JPS54115098A (en) 1979-09-07

Family

ID=12095785

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2291078A Pending JPS54115098A (en) 1978-02-28 1978-02-28 Integrated circuit

Country Status (1)

Country Link
JP (1) JPS54115098A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60120497U (en) * 1984-01-24 1985-08-14 天野商事株式会社 Automatic fire siren sounding device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60120497U (en) * 1984-01-24 1985-08-14 天野商事株式会社 Automatic fire siren sounding device

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