JPS5399805A - Loop supervisory system - Google Patents

Loop supervisory system

Info

Publication number
JPS5399805A
JPS5399805A JP1515177A JP1515177A JPS5399805A JP S5399805 A JPS5399805 A JP S5399805A JP 1515177 A JP1515177 A JP 1515177A JP 1515177 A JP1515177 A JP 1515177A JP S5399805 A JPS5399805 A JP S5399805A
Authority
JP
Japan
Prior art keywords
supervisory system
loop
loop supervisory
supervise
modem
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1515177A
Other languages
Japanese (ja)
Other versions
JPS6127960B2 (en
Inventor
Takeshi Sakai
Shuji Kimura
Toshiyuki Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP1515177A priority Critical patent/JPS5399805A/en
Publication of JPS5399805A publication Critical patent/JPS5399805A/en
Publication of JPS6127960B2 publication Critical patent/JPS6127960B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M9/00—Arrangements for interconnection not involving centralised switching
    • H04M9/02—Arrangements for interconnection not involving centralised switching involving a common line for all parties
    • H04M9/022—Multiplex systems
    • H04M9/025—Time division multiplex systems, e.g. loop systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Small-Scale Networks (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To make it possible to supervise the loop which contains a transmission line and MODEM by sending back the pilot signal from a master station at the remote equipment.
JP1515177A 1977-02-14 1977-02-14 Loop supervisory system Granted JPS5399805A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1515177A JPS5399805A (en) 1977-02-14 1977-02-14 Loop supervisory system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1515177A JPS5399805A (en) 1977-02-14 1977-02-14 Loop supervisory system

Publications (2)

Publication Number Publication Date
JPS5399805A true JPS5399805A (en) 1978-08-31
JPS6127960B2 JPS6127960B2 (en) 1986-06-27

Family

ID=11880790

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1515177A Granted JPS5399805A (en) 1977-02-14 1977-02-14 Loop supervisory system

Country Status (1)

Country Link
JP (1) JPS5399805A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59293A (en) * 1982-06-25 1984-01-05 Fujitsu Ltd Circuit controlling system
JPS59149446A (en) * 1983-02-17 1984-08-27 Nec Corp Testing system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS519316A (en) * 1974-07-11 1976-01-26 Fujitsu Ltd

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS519316A (en) * 1974-07-11 1976-01-26 Fujitsu Ltd

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59293A (en) * 1982-06-25 1984-01-05 Fujitsu Ltd Circuit controlling system
JPS59149446A (en) * 1983-02-17 1984-08-27 Nec Corp Testing system

Also Published As

Publication number Publication date
JPS6127960B2 (en) 1986-06-27

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