JPS5398710A - Folded test control system for circuit - Google Patents

Folded test control system for circuit

Info

Publication number
JPS5398710A
JPS5398710A JP1242377A JP1242377A JPS5398710A JP S5398710 A JPS5398710 A JP S5398710A JP 1242377 A JP1242377 A JP 1242377A JP 1242377 A JP1242377 A JP 1242377A JP S5398710 A JPS5398710 A JP S5398710A
Authority
JP
Japan
Prior art keywords
circuit
control system
test control
folded test
folded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1242377A
Other languages
Japanese (ja)
Inventor
Kenji Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1242377A priority Critical patent/JPS5398710A/en
Publication of JPS5398710A publication Critical patent/JPS5398710A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/24—Testing correct operation
    • H04L1/242—Testing correct operation by comparing a transmitted test signal with a locally generated replica
    • H04L1/243—Testing correct operation by comparing a transmitted test signal with a locally generated replica at the transmitter, using a loop-back

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

PURPOSE:To make efficient the test of circuit system, by folding the demodulating data to the transmission side with the selection instructing signal from the terminal equipment at the circuit to be tested.
JP1242377A 1977-02-09 1977-02-09 Folded test control system for circuit Pending JPS5398710A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1242377A JPS5398710A (en) 1977-02-09 1977-02-09 Folded test control system for circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1242377A JPS5398710A (en) 1977-02-09 1977-02-09 Folded test control system for circuit

Publications (1)

Publication Number Publication Date
JPS5398710A true JPS5398710A (en) 1978-08-29

Family

ID=11804852

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1242377A Pending JPS5398710A (en) 1977-02-09 1977-02-09 Folded test control system for circuit

Country Status (1)

Country Link
JP (1) JPS5398710A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5579551A (en) * 1978-12-12 1980-06-16 Toshiba Corp Communication controller
JPS5787646A (en) * 1980-11-20 1982-06-01 Ricoh Co Ltd Data transmission testing device
JPS5820049A (en) * 1981-07-29 1983-02-05 Hitachi Cable Ltd Data transmitting system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5579551A (en) * 1978-12-12 1980-06-16 Toshiba Corp Communication controller
JPS5787646A (en) * 1980-11-20 1982-06-01 Ricoh Co Ltd Data transmission testing device
JPS5820049A (en) * 1981-07-29 1983-02-05 Hitachi Cable Ltd Data transmitting system

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