JPS53942A - Double loop system back-up method - Google Patents
Double loop system back-up methodInfo
- Publication number
- JPS53942A JPS53942A JP7432876A JP7432876A JPS53942A JP S53942 A JPS53942 A JP S53942A JP 7432876 A JP7432876 A JP 7432876A JP 7432876 A JP7432876 A JP 7432876A JP S53942 A JPS53942 A JP S53942A
- Authority
- JP
- Japan
- Prior art keywords
- loop system
- double loop
- system back
- interposing
- enabling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Small-Scale Networks (AREA)
Abstract
PURPOSE: To constitute a highly reliable data transmission by interposing a command to a part of a data frame thereby enabling an efficient line disconnection and a control for the assembling condition and system constitution.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7432876A JPS53942A (en) | 1976-06-25 | 1976-06-25 | Double loop system back-up method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7432876A JPS53942A (en) | 1976-06-25 | 1976-06-25 | Double loop system back-up method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS53942A true JPS53942A (en) | 1978-01-07 |
JPS579542B2 JPS579542B2 (en) | 1982-02-22 |
Family
ID=13543927
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7432876A Granted JPS53942A (en) | 1976-06-25 | 1976-06-25 | Double loop system back-up method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS53942A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54140436A (en) * | 1978-04-24 | 1979-10-31 | Oki Electric Ind Co Ltd | Duplicating switch system for composite processor system |
JPS55124825A (en) * | 1979-03-20 | 1980-09-26 | Nec Corp | Bus control unit |
JPS5613854A (en) * | 1979-07-13 | 1981-02-10 | Hitachi Ltd | Double loop switching system |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5022505A (en) * | 1973-05-30 | 1975-03-11 | ||
JPS5177017A (en) * | 1974-12-27 | 1976-07-03 | Fujitsu Ltd | DEETADENSOROKIRIKAE HOSHIKI |
-
1976
- 1976-06-25 JP JP7432876A patent/JPS53942A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5022505A (en) * | 1973-05-30 | 1975-03-11 | ||
JPS5177017A (en) * | 1974-12-27 | 1976-07-03 | Fujitsu Ltd | DEETADENSOROKIRIKAE HOSHIKI |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54140436A (en) * | 1978-04-24 | 1979-10-31 | Oki Electric Ind Co Ltd | Duplicating switch system for composite processor system |
JPS55124825A (en) * | 1979-03-20 | 1980-09-26 | Nec Corp | Bus control unit |
JPS5613854A (en) * | 1979-07-13 | 1981-02-10 | Hitachi Ltd | Double loop switching system |
Also Published As
Publication number | Publication date |
---|---|
JPS579542B2 (en) | 1982-02-22 |
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