JPS539251Y2 - - Google Patents

Info

Publication number
JPS539251Y2
JPS539251Y2 JP1974154778U JP15477874U JPS539251Y2 JP S539251 Y2 JPS539251 Y2 JP S539251Y2 JP 1974154778 U JP1974154778 U JP 1974154778U JP 15477874 U JP15477874 U JP 15477874U JP S539251 Y2 JPS539251 Y2 JP S539251Y2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1974154778U
Other languages
Japanese (ja)
Other versions
JPS5180059U (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1974154778U priority Critical patent/JPS539251Y2/ja
Publication of JPS5180059U publication Critical patent/JPS5180059U/ja
Application granted granted Critical
Publication of JPS539251Y2 publication Critical patent/JPS539251Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • H01L2924/15155Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
    • H01L2924/15157Top view

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
JP1974154778U 1974-12-19 1974-12-19 Expired JPS539251Y2 (en:Method)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1974154778U JPS539251Y2 (en:Method) 1974-12-19 1974-12-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1974154778U JPS539251Y2 (en:Method) 1974-12-19 1974-12-19

Publications (2)

Publication Number Publication Date
JPS5180059U JPS5180059U (en:Method) 1976-06-25
JPS539251Y2 true JPS539251Y2 (en:Method) 1978-03-10

Family

ID=28446110

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1974154778U Expired JPS539251Y2 (en:Method) 1974-12-19 1974-12-19

Country Status (1)

Country Link
JP (1) JPS539251Y2 (en:Method)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS554985A (en) * 1978-06-27 1980-01-14 Nec Kyushu Ltd Lead frame for semiconductor device
JP5140413B2 (ja) * 2007-12-28 2013-02-06 株式会社日立製作所 実装基板、及びこの実装基板を備えるled光源装置

Also Published As

Publication number Publication date
JPS5180059U (en:Method) 1976-06-25

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