JPS5381020A - Error check method for memory unit - Google Patents
Error check method for memory unitInfo
- Publication number
- JPS5381020A JPS5381020A JP15867776A JP15867776A JPS5381020A JP S5381020 A JPS5381020 A JP S5381020A JP 15867776 A JP15867776 A JP 15867776A JP 15867776 A JP15867776 A JP 15867776A JP S5381020 A JPS5381020 A JP S5381020A
- Authority
- JP
- Japan
- Prior art keywords
- memory unit
- error check
- check method
- error
- assigning
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- Debugging And Monitoring (AREA)
Abstract
PURPOSE: To obtain the simplified error correcting method of maintenance, test, etc. by assigning an error module by means of error addressed and error bits.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15867776A JPS5381020A (en) | 1976-12-27 | 1976-12-27 | Error check method for memory unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15867776A JPS5381020A (en) | 1976-12-27 | 1976-12-27 | Error check method for memory unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5381020A true JPS5381020A (en) | 1978-07-18 |
Family
ID=15676942
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15867776A Pending JPS5381020A (en) | 1976-12-27 | 1976-12-27 | Error check method for memory unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5381020A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6180343A (en) * | 1984-09-27 | 1986-04-23 | Fujitsu Ltd | Testing method of mounted memory |
US5394373A (en) * | 1990-11-16 | 1995-02-28 | Fujitsu Limited | Semiconductor memory having a high-speed address decoder |
-
1976
- 1976-12-27 JP JP15867776A patent/JPS5381020A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6180343A (en) * | 1984-09-27 | 1986-04-23 | Fujitsu Ltd | Testing method of mounted memory |
US5394373A (en) * | 1990-11-16 | 1995-02-28 | Fujitsu Limited | Semiconductor memory having a high-speed address decoder |
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