JPS5365607A - Time slot conversion system - Google Patents

Time slot conversion system

Info

Publication number
JPS5365607A
JPS5365607A JP14142976A JP14142976A JPS5365607A JP S5365607 A JPS5365607 A JP S5365607A JP 14142976 A JP14142976 A JP 14142976A JP 14142976 A JP14142976 A JP 14142976A JP S5365607 A JPS5365607 A JP S5365607A
Authority
JP
Japan
Prior art keywords
time slot
conversion system
slot conversion
time
eliminate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14142976A
Other languages
Japanese (ja)
Other versions
JPS571191B2 (en
Inventor
Kazuo Hamasato
Tomoji Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP14142976A priority Critical patent/JPS5365607A/en
Publication of JPS5365607A publication Critical patent/JPS5365607A/en
Publication of JPS571191B2 publication Critical patent/JPS571191B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To achieve the frame aligner function for a time-division exchange without increasing the memory as well as to eliminate the effect of the slip occurred at the time slot under being used.
JP14142976A 1976-11-24 1976-11-24 Time slot conversion system Granted JPS5365607A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14142976A JPS5365607A (en) 1976-11-24 1976-11-24 Time slot conversion system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14142976A JPS5365607A (en) 1976-11-24 1976-11-24 Time slot conversion system

Publications (2)

Publication Number Publication Date
JPS5365607A true JPS5365607A (en) 1978-06-12
JPS571191B2 JPS571191B2 (en) 1982-01-09

Family

ID=15291761

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14142976A Granted JPS5365607A (en) 1976-11-24 1976-11-24 Time slot conversion system

Country Status (1)

Country Link
JP (1) JPS5365607A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59126991U (en) * 1983-02-17 1984-08-27 日立化成工業株式会社 Brace seat of panel assembly type aquarium
JPS59164482A (en) * 1983-03-07 1984-09-17 株式会社クボタ Method of joining inner-surface lining metallic pipe
JPS59172193U (en) * 1983-05-06 1984-11-17 三菱樹脂株式会社 Assembly type liquid storage tank
JPS6117093U (en) * 1984-07-03 1986-01-31 積水プラントシステム株式会社 Tank with bulkhead

Also Published As

Publication number Publication date
JPS571191B2 (en) 1982-01-09

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