JPS5363853A - Digital phase constrained loop circuit given consideration of initial - Google Patents
Digital phase constrained loop circuit given consideration of initialInfo
- Publication number
- JPS5363853A JPS5363853A JP13876776A JP13876776A JPS5363853A JP S5363853 A JPS5363853 A JP S5363853A JP 13876776 A JP13876776 A JP 13876776A JP 13876776 A JP13876776 A JP 13876776A JP S5363853 A JPS5363853 A JP S5363853A
- Authority
- JP
- Japan
- Prior art keywords
- loop circuit
- digital phase
- initial
- constrained loop
- circuit given
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004904 shortening Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:The counter and counter register of a digital phase constrained loop circuit are so constituted that their reset status can be released in an initial starting, thereby shortening the time until the normal operation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13876776A JPS5363853A (en) | 1976-11-18 | 1976-11-18 | Digital phase constrained loop circuit given consideration of initial |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13876776A JPS5363853A (en) | 1976-11-18 | 1976-11-18 | Digital phase constrained loop circuit given consideration of initial |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5363853A true JPS5363853A (en) | 1978-06-07 |
Family
ID=15229707
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13876776A Pending JPS5363853A (en) | 1976-11-18 | 1976-11-18 | Digital phase constrained loop circuit given consideration of initial |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5363853A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07264673A (en) * | 1993-12-31 | 1995-10-13 | Alcatel Nv | Method and equipment for automatic synchronization of data burst |
-
1976
- 1976-11-18 JP JP13876776A patent/JPS5363853A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07264673A (en) * | 1993-12-31 | 1995-10-13 | Alcatel Nv | Method and equipment for automatic synchronization of data burst |
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