JPS5360505A - Channel conversion control system - Google Patents

Channel conversion control system

Info

Publication number
JPS5360505A
JPS5360505A JP13574376A JP13574376A JPS5360505A JP S5360505 A JPS5360505 A JP S5360505A JP 13574376 A JP13574376 A JP 13574376A JP 13574376 A JP13574376 A JP 13574376A JP S5360505 A JPS5360505 A JP S5360505A
Authority
JP
Japan
Prior art keywords
control system
conversion control
channel conversion
sub
maximum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13574376A
Other languages
Japanese (ja)
Inventor
Hiroaki Sato
Takuto Kojima
Masaaki Ito
Takemi Arita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP13574376A priority Critical patent/JPS5360505A/en
Publication of JPS5360505A publication Critical patent/JPS5360505A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

PURPOSE:The information of a high-speed circuit is converted with the delay of approximate one sub-frame interval at its maximum, so that the waiting time for switching can be within one sub-channel at its maximum.
JP13574376A 1976-11-11 1976-11-11 Channel conversion control system Pending JPS5360505A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13574376A JPS5360505A (en) 1976-11-11 1976-11-11 Channel conversion control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13574376A JPS5360505A (en) 1976-11-11 1976-11-11 Channel conversion control system

Publications (1)

Publication Number Publication Date
JPS5360505A true JPS5360505A (en) 1978-05-31

Family

ID=15158823

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13574376A Pending JPS5360505A (en) 1976-11-11 1976-11-11 Channel conversion control system

Country Status (1)

Country Link
JP (1) JPS5360505A (en)

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