JPS5344156A - Pll oscillation equipment - Google Patents

Pll oscillation equipment

Info

Publication number
JPS5344156A
JPS5344156A JP11975576A JP11975576A JPS5344156A JP S5344156 A JPS5344156 A JP S5344156A JP 11975576 A JP11975576 A JP 11975576A JP 11975576 A JP11975576 A JP 11975576A JP S5344156 A JPS5344156 A JP S5344156A
Authority
JP
Japan
Prior art keywords
pll oscillation
oscillation equipment
pll
equipment
oscillation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11975576A
Other languages
Japanese (ja)
Inventor
Akitoshi Aritaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11975576A priority Critical patent/JPS5344156A/en
Publication of JPS5344156A publication Critical patent/JPS5344156A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:Oscillation outputs for reception and transmission are respectively inputted to frequency mixer 8 for PLL, so that the oscillation output having even unneeded spurious radiation, etc., can be obtained with its frequency stabilized.
JP11975576A 1976-10-04 1976-10-04 Pll oscillation equipment Pending JPS5344156A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11975576A JPS5344156A (en) 1976-10-04 1976-10-04 Pll oscillation equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11975576A JPS5344156A (en) 1976-10-04 1976-10-04 Pll oscillation equipment

Publications (1)

Publication Number Publication Date
JPS5344156A true JPS5344156A (en) 1978-04-20

Family

ID=14769348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11975576A Pending JPS5344156A (en) 1976-10-04 1976-10-04 Pll oscillation equipment

Country Status (1)

Country Link
JP (1) JPS5344156A (en)

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