JPS5326504A - Frame synchronizing system - Google Patents

Frame synchronizing system

Info

Publication number
JPS5326504A
JPS5326504A JP9754977A JP9754977A JPS5326504A JP S5326504 A JPS5326504 A JP S5326504A JP 9754977 A JP9754977 A JP 9754977A JP 9754977 A JP9754977 A JP 9754977A JP S5326504 A JPS5326504 A JP S5326504A
Authority
JP
Japan
Prior art keywords
frame synchronizing
synchronizing system
frame
synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9754977A
Other languages
English (en)
Inventor
Riyuude Jiyatsuku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel CIT SA
Original Assignee
Alcatel CIT SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel CIT SA filed Critical Alcatel CIT SA
Publication of JPS5326504A publication Critical patent/JPS5326504A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/05—Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Executing Machine-Instructions (AREA)
JP9754977A 1976-08-20 1977-08-16 Frame synchronizing system Pending JPS5326504A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7625345A FR2362527A1 (fr) 1976-08-20 1976-08-20 Dispositif de synchronisation " trame "

Publications (1)

Publication Number Publication Date
JPS5326504A true JPS5326504A (en) 1978-03-11

Family

ID=9177036

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9754977A Pending JPS5326504A (en) 1976-08-20 1977-08-16 Frame synchronizing system

Country Status (12)

Country Link
US (1) US4121057A (ja)
JP (1) JPS5326504A (ja)
BE (1) BE857348A (ja)
CA (1) CA1092245A (ja)
DE (1) DE2736503A1 (ja)
DK (1) DK370477A (ja)
FR (1) FR2362527A1 (ja)
GB (1) GB1534669A (ja)
IE (1) IE45566B1 (ja)
IT (1) IT1086052B (ja)
LU (1) LU77980A1 (ja)
NL (1) NL7708997A (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ZA804386B (en) * 1979-08-10 1981-07-29 Plessey Co Ltd Frame aligner for digital telecommunications exchange system
DE3019078C2 (de) * 1980-05-19 1982-08-26 Siemens Ag, 1000 Berlin Und 8000 Muenchen Synchronisiereinrichtung für ein Zeitmultiplexsystem
US4531210A (en) * 1983-06-22 1985-07-23 Gte Automatic Electric Incorporated Digital span reframing circuit
GB2151437B (en) * 1983-12-13 1987-04-29 Plessey Co Plc Frame aligner for use in telecommunication exchange systems

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3421147A (en) * 1965-05-07 1969-01-07 Bell Telephone Labor Inc Buffer arrangement
US3867579A (en) * 1973-12-21 1975-02-18 Bell Telephone Labor Inc Synchronization apparatus for a time division switching system
JPS5518085B2 (ja) * 1974-08-14 1980-05-16
US4002845A (en) * 1975-03-26 1977-01-11 Digital Communications Corporation Frame synchronizer
US4045618A (en) * 1976-01-29 1977-08-30 Compagnie Industrielle Des Telecommunications Cit-Alcatel S.A. Device for synchronizing a binary data train in relation to a reference train

Also Published As

Publication number Publication date
US4121057A (en) 1978-10-17
DE2736503A1 (de) 1978-02-23
GB1534669A (en) 1978-12-06
LU77980A1 (ja) 1978-04-27
DK370477A (da) 1978-02-21
FR2362527B1 (ja) 1979-01-12
BE857348A (fr) 1978-02-01
FR2362527A1 (fr) 1978-03-17
IE45566L (en) 1978-02-20
CA1092245A (fr) 1980-12-23
IT1086052B (it) 1985-05-28
IE45566B1 (en) 1982-09-22
NL7708997A (nl) 1978-02-22

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