JPS53148346A - Fresh control circuit of assynchronous daynamic type memory - Google Patents

Fresh control circuit of assynchronous daynamic type memory

Info

Publication number
JPS53148346A
JPS53148346A JP6355477A JP6355477A JPS53148346A JP S53148346 A JPS53148346 A JP S53148346A JP 6355477 A JP6355477 A JP 6355477A JP 6355477 A JP6355477 A JP 6355477A JP S53148346 A JPS53148346 A JP S53148346A
Authority
JP
Japan
Prior art keywords
assynchronous
daynamic
control circuit
type memory
fresh control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6355477A
Other languages
Japanese (ja)
Inventor
Katsuhisa Kubota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6355477A priority Critical patent/JPS53148346A/en
Publication of JPS53148346A publication Critical patent/JPS53148346A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Abstract

PURPOSE:To enable the refresh control of assynchronous dynamic memory with a simple circuit and to reduce the cost, by constituting the circuit only with three flip flop's and one AND gate.
JP6355477A 1977-05-31 1977-05-31 Fresh control circuit of assynchronous daynamic type memory Pending JPS53148346A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6355477A JPS53148346A (en) 1977-05-31 1977-05-31 Fresh control circuit of assynchronous daynamic type memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6355477A JPS53148346A (en) 1977-05-31 1977-05-31 Fresh control circuit of assynchronous daynamic type memory

Publications (1)

Publication Number Publication Date
JPS53148346A true JPS53148346A (en) 1978-12-23

Family

ID=13232550

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6355477A Pending JPS53148346A (en) 1977-05-31 1977-05-31 Fresh control circuit of assynchronous daynamic type memory

Country Status (1)

Country Link
JP (1) JPS53148346A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01144295A (en) * 1987-11-30 1989-06-06 Nec Corp Microcomputer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01144295A (en) * 1987-11-30 1989-06-06 Nec Corp Microcomputer

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