JPS53145550A - Output level stabilizing circuit - Google Patents
Output level stabilizing circuitInfo
- Publication number
- JPS53145550A JPS53145550A JP6152277A JP6152277A JPS53145550A JP S53145550 A JPS53145550 A JP S53145550A JP 6152277 A JP6152277 A JP 6152277A JP 6152277 A JP6152277 A JP 6152277A JP S53145550 A JPS53145550 A JP S53145550A
- Authority
- JP
- Japan
- Prior art keywords
- output level
- stabilizing circuit
- level stabilizing
- circuit
- malfucntion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
- H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
- H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Electronic Switches (AREA)
Abstract
PURPOSE:To avoid the malfucntion for thecontrolled circuit by setting under a steady constant state the level of the output circuit of MOS strcuture which features a resetting function when the power source is thrown in.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6152277A JPS53145550A (en) | 1977-05-25 | 1977-05-25 | Output level stabilizing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6152277A JPS53145550A (en) | 1977-05-25 | 1977-05-25 | Output level stabilizing circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS53145550A true JPS53145550A (en) | 1978-12-18 |
Family
ID=13173500
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6152277A Pending JPS53145550A (en) | 1977-05-25 | 1977-05-25 | Output level stabilizing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS53145550A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0576199A (en) * | 1991-09-13 | 1993-03-26 | Hitachi Ltd | Switch circuit and stepping motor driving circuit using same |
US5721502A (en) * | 1995-06-06 | 1998-02-24 | Analog Devices, Inc. | Voltage-controlled reset for logic state initialization |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49112530A (en) * | 1973-02-23 | 1974-10-26 | ||
JPS51135356A (en) * | 1975-05-19 | 1976-11-24 | Sharp Corp | C-mos switch circuit |
-
1977
- 1977-05-25 JP JP6152277A patent/JPS53145550A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49112530A (en) * | 1973-02-23 | 1974-10-26 | ||
JPS51135356A (en) * | 1975-05-19 | 1976-11-24 | Sharp Corp | C-mos switch circuit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0576199A (en) * | 1991-09-13 | 1993-03-26 | Hitachi Ltd | Switch circuit and stepping motor driving circuit using same |
US5721502A (en) * | 1995-06-06 | 1998-02-24 | Analog Devices, Inc. | Voltage-controlled reset for logic state initialization |
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