JPS5314546A - Dynamic inverter circuit - Google Patents
Dynamic inverter circuitInfo
- Publication number
- JPS5314546A JPS5314546A JP8816076A JP8816076A JPS5314546A JP S5314546 A JPS5314546 A JP S5314546A JP 8816076 A JP8816076 A JP 8816076A JP 8816076 A JP8816076 A JP 8816076A JP S5314546 A JPS5314546 A JP S5314546A
- Authority
- JP
- Japan
- Prior art keywords
- inverter circuit
- dynamic inverter
- dynamic
- address buffer
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To constitute the dynamic inverter circuit composing an address buffer circuit in such a way that the ratch of the address buffer may be given quickly.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8816076A JPS5314546A (en) | 1976-07-26 | 1976-07-26 | Dynamic inverter circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8816076A JPS5314546A (en) | 1976-07-26 | 1976-07-26 | Dynamic inverter circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5314546A true JPS5314546A (en) | 1978-02-09 |
Family
ID=13935162
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8816076A Pending JPS5314546A (en) | 1976-07-26 | 1976-07-26 | Dynamic inverter circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5314546A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5815330A (en) * | 1981-07-21 | 1983-01-28 | Toshiba Corp | Integrated circuit |
US4504746A (en) * | 1981-04-16 | 1985-03-12 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor buffer circuit using enhancement-mode, depletion-mode and zero threshold mode transistors |
-
1976
- 1976-07-26 JP JP8816076A patent/JPS5314546A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4504746A (en) * | 1981-04-16 | 1985-03-12 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor buffer circuit using enhancement-mode, depletion-mode and zero threshold mode transistors |
JPS5815330A (en) * | 1981-07-21 | 1983-01-28 | Toshiba Corp | Integrated circuit |
JPH0129096B2 (en) * | 1981-07-21 | 1989-06-07 | Tokyo Shibaura Electric Co |
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