JPS5313078U - - Google Patents

Info

Publication number
JPS5313078U
JPS5313078U JP1976093934U JP9393476U JPS5313078U JP S5313078 U JPS5313078 U JP S5313078U JP 1976093934 U JP1976093934 U JP 1976093934U JP 9393476 U JP9393476 U JP 9393476U JP S5313078 U JPS5313078 U JP S5313078U
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1976093934U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1976093934U priority Critical patent/JPS5313078U/ja
Publication of JPS5313078U publication Critical patent/JPS5313078U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP1976093934U 1976-07-14 1976-07-14 Pending JPS5313078U (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1976093934U JPS5313078U (enExample) 1976-07-14 1976-07-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1976093934U JPS5313078U (enExample) 1976-07-14 1976-07-14

Publications (1)

Publication Number Publication Date
JPS5313078U true JPS5313078U (enExample) 1978-02-03

Family

ID=28704509

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1976093934U Pending JPS5313078U (enExample) 1976-07-14 1976-07-14

Country Status (1)

Country Link
JP (1) JPS5313078U (enExample)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS495597A (enExample) * 1972-05-05 1974-01-18

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS495597A (enExample) * 1972-05-05 1974-01-18

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