JPS53119862U - - Google Patents

Info

Publication number
JPS53119862U
JPS53119862U JP1977024545U JP2454577U JPS53119862U JP S53119862 U JPS53119862 U JP S53119862U JP 1977024545 U JP1977024545 U JP 1977024545U JP 2454577 U JP2454577 U JP 2454577U JP S53119862 U JPS53119862 U JP S53119862U
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1977024545U
Other languages
Japanese (ja)
Other versions
JPS6141246Y2 (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1977024545U priority Critical patent/JPS6141246Y2/ja
Publication of JPS53119862U publication Critical patent/JPS53119862U/ja
Application granted granted Critical
Publication of JPS6141246Y2 publication Critical patent/JPS6141246Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1977024545U 1977-02-28 1977-02-28 Expired JPS6141246Y2 (en:Method)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1977024545U JPS6141246Y2 (en:Method) 1977-02-28 1977-02-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1977024545U JPS6141246Y2 (en:Method) 1977-02-28 1977-02-28

Publications (2)

Publication Number Publication Date
JPS53119862U true JPS53119862U (en:Method) 1978-09-22
JPS6141246Y2 JPS6141246Y2 (en:Method) 1986-11-25

Family

ID=28863229

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1977024545U Expired JPS6141246Y2 (en:Method) 1977-02-28 1977-02-28

Country Status (1)

Country Link
JP (1) JPS6141246Y2 (en:Method)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5674948A (en) * 1979-11-22 1981-06-20 Hitachi Ltd Lead structure of semiconductor device
JPS60154646A (ja) * 1984-01-25 1985-08-14 Hitachi Micro Comput Eng Ltd 半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5133161U (en:Method) * 1974-08-31 1976-03-11

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5133161U (en:Method) * 1974-08-31 1976-03-11

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5674948A (en) * 1979-11-22 1981-06-20 Hitachi Ltd Lead structure of semiconductor device
JPS60154646A (ja) * 1984-01-25 1985-08-14 Hitachi Micro Comput Eng Ltd 半導体装置

Also Published As

Publication number Publication date
JPS6141246Y2 (en:Method) 1986-11-25

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