JPS5310262B2 - - Google Patents
Info
- Publication number
- JPS5310262B2 JPS5310262B2 JP6658671A JP6658671A JPS5310262B2 JP S5310262 B2 JPS5310262 B2 JP S5310262B2 JP 6658671 A JP6658671 A JP 6658671A JP 6658671 A JP6658671 A JP 6658671A JP S5310262 B2 JPS5310262 B2 JP S5310262B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Blow-Moulding Or Thermoforming Of Plastics Or The Like (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Wire Bonding (AREA)
- Laminated Bodies (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6658671A JPS5310262B2 (https=) | 1971-09-01 | 1971-09-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6658671A JPS5310262B2 (https=) | 1971-09-01 | 1971-09-01 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4833355A JPS4833355A (https=) | 1973-05-09 |
| JPS5310262B2 true JPS5310262B2 (https=) | 1978-04-12 |
Family
ID=13320182
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6658671A Expired JPS5310262B2 (https=) | 1971-09-01 | 1971-09-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5310262B2 (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54145168U (https=) * | 1978-03-31 | 1979-10-08 |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50133455A (https=) * | 1974-04-15 | 1975-10-22 | ||
| JPS50140859A (https=) * | 1974-04-30 | 1975-11-12 | ||
| JPS5553498A (en) * | 1978-10-14 | 1980-04-18 | Matsushita Electric Works Ltd | Method of manufacturing multilayer printed circuit board |
| JPH03191595A (ja) * | 1989-12-20 | 1991-08-21 | Risho Kogyo Co Ltd | 多層回路基板用片面金属張積層板の製造方法 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1004765A (en) * | 1963-03-29 | 1965-09-15 | Formica Int | Handling laminating plates |
-
1971
- 1971-09-01 JP JP6658671A patent/JPS5310262B2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54145168U (https=) * | 1978-03-31 | 1979-10-08 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS4833355A (https=) | 1973-05-09 |